mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 17:44:19 +00:00
520c2207b9
This patch mitigates CVE-2024-7881 [1] by setting CPUACTLR6_EL1[41] to 1 for Cortex-X925 CPU. [1]: https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-7881 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I53e72e4dbc8937cea3c344a5ba04664c50a0792a
29 lines
1.1 KiB
C
29 lines
1.1 KiB
C
/*
|
|
* Copyright (c) 2023-2025, Arm Limited. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef CORTEX_X925_H
|
|
#define CORTEX_X925_H
|
|
|
|
#define CORTEX_X925_MIDR U(0x410FD850)
|
|
|
|
/*******************************************************************************
|
|
* CPU Extended Control register specific definitions
|
|
******************************************************************************/
|
|
#define CORTEX_X925_CPUECTLR_EL1 S3_0_C15_C1_4
|
|
#define CORTEX_X925_CPUECTLR_EL1_EXTLLC_BIT U(0)
|
|
|
|
/*******************************************************************************
|
|
* CPU Power Control register specific definitions
|
|
******************************************************************************/
|
|
#define CORTEX_X925_CPUPWRCTLR_EL1 S3_0_C15_C2_7
|
|
#define CORTEX_X925_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
|
|
|
|
/*******************************************************************************
|
|
* CPU Auxiliary control register 6 specific definitions
|
|
******************************************************************************/
|
|
#define CORTEX_X925_CPUACTLR6_EL1 S3_0_C15_C8_1
|
|
|
|
#endif /* CORTEX_X925_H */
|