Ghennadi Procopciuc 5071f7c7ee feat(s32g274a): add ncore support ... Ncore is a cache-coherent interconnect module. It enables the integration of heterogenous coherent agents and non-coherent agents in a chip. TF-A boots with the first core in isolation to avoid crashes due to cache invalidation operations. Later, it will disable the isolation and reconfigure the module every time a new core is added or removed through PSCI. Change-Id: Ida42db91b10be1e66c3b9b73674d1e37a61844dd Signed-off-by: Dan Nica <dan.nica@nxp.com> Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>		2024-10-08 13:38:46 +03:00
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common	build: unify verbosity handling	2024-06-14 15:54:48 +00:00
s32/s32g274ardb2	feat(s32g274a): add ncore support	2024-10-08 13:38:46 +03:00
soc-ls1028a	fix(layerscape): fix errata a008850	2022-11-22 14:56:19 +08:00
soc-ls1043a	fix(layerscape): unlock write access SMMU_CBn_ACTLR	2022-12-06 22:46:10 +08:00
soc-ls1046a	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
soc-ls1088a	fix(tree): correct some typos	2023-05-09 15:57:12 +01:00
soc-lx2160a	build: consolidate directory creation rules	2024-07-22 09:41:30 +00:00