Jayanth Dodderi Chidanand 4ec4e545c6 feat(sctlr2): add support for FEAT_SCTLR2 ... Arm v8.9 introduces FEAT_SCTLR2, adding SCTLR2_ELx registers. Support this, context switching the registers and disabling traps so lower ELs can access the new registers. Change the FVP platform to default to handling this as a dynamic option so the right decision can be made by the code at runtime. Change-Id: I0c4cba86917b6b065a7e8dd6af7daf64ee18dcda Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>		2024-10-13 18:44:54 -05:00
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aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	feat(sctlr2): add support for FEAT_SCTLR2	2024-10-13 18:44:54 -05:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
simd_ctx.c	feat(simd): introduce simd context helper APIs	2024-08-19 11:10:10 -05:00