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b139f1cf97
The Arm(R) Ethos(TM)-N NPU driver now supports configuring the SMMU streams that the NPU shall use and will therefore no longer delegate access to these registers to the non-secure world. In order for the driver to support this, the device tree parsing has been updated to support parsing the allocators used by the NPU and what SMMU stream that is associated with each allocator. To keep track of what NPU device each allocator is associated with, the resulting config from the device tree parsing will now group the NPU cores and allocators into their respective NPU device. The SMC API has been changed to allow the caller to specify what allocator the NPU shall be configured to use and the API version has been bumped to indicate this change. Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I6ac43819133138614e3f55a014e93466fe3d5277
76 lines
1.5 KiB
Text
76 lines
1.5 KiB
Text
/*
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* Copyright (c) 2021-2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* This device tree is only an example and some properties have been omitted.
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*
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* Refer to the Arm(R) Ethos(TM)-N driver stack for complete device tree examples.
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* https://github.com/ARM-software/ethos-n-driver-stack
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*/
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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smmu_ethosn0: iommu@6f400000 {
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compatible = "arm,smmu-v3";
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reg = <0 0x6f400000 0 0x80000>;
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status = "okay";
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/* msi-parent omitted */
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#iommu-cells = <0x1>;
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};
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ethosn0: ethosn@6f300000 {
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compatible = "ethosn";
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reg = <0 0x6f300000 0 0x00100000>;
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status = "okay";
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core0 {
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compatible = "ethosn-core";
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status = "okay";
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main_allocator {
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compatible = "ethosn-main_allocator";
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status = "okay";
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firmware {
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compatible = "ethosn-memory";
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iommus = <&smmu_ethosn0 0>;
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};
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working_data {
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compatible = "ethosn-memory";
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iommus = <&smmu_ethosn0 1>;
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};
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};
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};
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asset_allocator {
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compatible = "ethosn-asset_allocator";
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status = "okay";
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command_stream {
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compatible = "ethosn-memory";
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iommus = <&smmu_ethosn0 2>;
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};
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weight_data {
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compatible = "ethosn-memory";
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iommus = <&smmu_ethosn0 3>;
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};
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buffer_data {
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compatible = "ethosn-memory";
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iommus = <&smmu_ethosn0 4>;
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};
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intermediate_data {
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compatible = "ethosn-memory";
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iommus = <&smmu_ethosn0 5>;
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};
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};
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};
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};
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