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https://github.com/ARM-software/arm-trusted-firmware.git
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4d4821569d
Add tsp service to check the value of the PSTATE DIT bit is as expected and toggle it's value. This is used to ensure that the DIT bit is maintained during a switch from the Normal to Secure worlds and back. Change-Id: I4e8bdfa6530e5e75925c0079d4fa2795133c5105 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
143 lines
3.7 KiB
C
143 lines
3.7 KiB
C
/*
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* Copyright (c) 2019-2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARCH_FEATURES_H
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#define ARCH_FEATURES_H
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#include <stdbool.h>
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#include <arch_helpers.h>
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static inline bool is_armv7_gentimer_present(void)
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{
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/* The Generic Timer is always present in an ARMv8-A implementation */
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return true;
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}
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static inline bool is_armv8_1_pan_present(void)
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{
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return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_PAN_SHIFT) &
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ID_AA64MMFR1_EL1_PAN_MASK) != 0U;
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}
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static inline bool is_armv8_1_vhe_present(void)
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{
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return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_VHE_SHIFT) &
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ID_AA64MMFR1_EL1_VHE_MASK) != 0U;
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}
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static inline bool is_armv8_2_ttcnp_present(void)
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{
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return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
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ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
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}
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static inline bool is_armv8_3_pauth_present(void)
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{
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uint64_t mask = (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
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(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
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(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
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(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
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/* If any of the fields is not zero, PAuth is present */
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return (read_id_aa64isar1_el1() & mask) != 0U;
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}
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static inline bool is_armv8_4_dit_present(void)
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{
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return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
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ID_AA64PFR0_DIT_MASK) == 1U;
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}
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static inline bool is_armv8_4_ttst_present(void)
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{
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return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
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ID_AA64MMFR2_EL1_ST_MASK) == 1U;
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}
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static inline bool is_armv8_5_bti_present(void)
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{
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return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
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ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
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}
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static inline unsigned int get_armv8_5_mte_support(void)
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{
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return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
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ID_AA64PFR1_EL1_MTE_MASK);
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}
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static inline bool is_armv8_4_sel2_present(void)
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{
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return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) &
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ID_AA64PFR0_SEL2_MASK) == 1ULL;
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}
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static inline bool is_armv8_6_twed_present(void)
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{
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return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) &
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ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
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}
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static inline bool is_armv8_6_fgt_present(void)
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{
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return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_FGT_SHIFT) &
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ID_AA64MMFR0_EL1_FGT_MASK) == ID_AA64MMFR0_EL1_FGT_SUPPORTED;
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}
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static inline unsigned long int get_armv8_6_ecv_support(void)
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{
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return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) &
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ID_AA64MMFR0_EL1_ECV_MASK);
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}
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static inline bool is_armv8_5_rng_present(void)
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{
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return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) &
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ID_AA64ISAR0_RNDR_MASK);
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}
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static inline bool is_armv8_6_feat_amuv1p1_present(void)
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{
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return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT) &
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ID_AA64PFR0_AMU_MASK) >= ID_AA64PFR0_AMU_V1P1);
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}
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/*
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* Return MPAM version:
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*
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* 0x00: None Armv8.0 or later
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* 0x01: v0.1 Armv8.4 or later
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* 0x10: v1.0 Armv8.2 or later
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* 0x11: v1.1 Armv8.4 or later
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*
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*/
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static inline unsigned int get_mpam_version(void)
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{
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return (unsigned int)((((read_id_aa64pfr0_el1() >>
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ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
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((read_id_aa64pfr1_el1() >>
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ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
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}
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static inline bool is_feat_hcx_present(void)
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{
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return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_HCX_SHIFT) &
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ID_AA64MMFR1_EL1_HCX_MASK) == ID_AA64MMFR1_EL1_HCX_SUPPORTED);
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}
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static inline unsigned int get_armv9_2_feat_rme_support(void)
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{
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/*
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* Return the RME version, zero if not supported. This function can be
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* used as both an integer value for the RME version or compared to zero
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* to detect RME presence.
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*/
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return (unsigned int)(read_id_aa64pfr0_el1() >>
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ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
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}
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#endif /* ARCH_FEATURES_H */
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