mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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4ced59568e
Currently, neoverse_rd is hosted under the "css" directory. However,
"css" directory is more relevant for hosting css definitions and
corresponding sources. Since neoverse_rd hosts source and header for css
and soc, move neoverse_rd from css to board folder. Consolidate common
sources and headers under neoverse_rd/common. Additionally, group RD-V1,
RD-V1-MC, RD-N2, RD-N1-Edgex2 and SGI-575 within neoverse_rd/platform.
With the changes in this commit, the tree view would look as follows:
plat/arm/board/neoverse_rd/
├── common
│ ├── arch
│ ├── include
│ └── ras
└── platform
├── rdn1edge
├── rdn2
├── rdv1
├── rdv1mc
└── sgi575
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: Iaccc86bc9d415f5c045c834902241fcf3c00277b
68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
/*
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* Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef NRD_RAS_H
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#define NRD_RAS_H
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#include <lib/extensions/ras.h>
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#include <plat/common/platform.h>
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/*
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* Interrupt type supported.
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* - SGI_RAS_INTR_TYPE_SPI: Denotes a SPI interrupt
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* - SGI_RAS_INTR_TYPE_PPI: Denotes a PPI interrupt
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*/
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#define SGI_RAS_INTR_TYPE_SPI 0
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#define SGI_RAS_INTR_TYPE_PPI 1
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/*
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* MM Communicate information structure. Required to generate MM Communicate
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* payload to be shared with Standalone MM.
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*/
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typedef struct mm_communicate_header {
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struct efi_guid header_guid;
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size_t message_len;
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uint8_t data[1];
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} mm_communicate_header_t;
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/* RAS error info data structure. */
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struct sgi_ras_ev_map {
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int sdei_ev_num; /* SDEI Event number */
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int intr; /* Physical intr number */
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int intr_type; /* Interrupt Type (SPI or PPI)*/
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};
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/* RAS config data structure. Must be defined by each platform. */
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struct plat_sgi_ras_config {
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struct sgi_ras_ev_map *ev_map;
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int ev_map_size;
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};
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/*
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* Find event map for a given interrupt number. On success, returns pointer
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* to the event map. On error, returns NULL.
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*/
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struct sgi_ras_ev_map *sgi_find_ras_event_map_by_intr(uint32_t intr_num);
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/*
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* Initialization function for the framework.
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*
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* Registers RAS config provided by the platform and then configures and
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* enables interrupt for each registered error. On success, return 0.
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*/
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int sgi_ras_platform_setup(struct plat_sgi_ras_config *config);
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/* Base element RAM RAS interrupt handler function. */
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int sgi_ras_sram_intr_handler(const struct err_record_info *err_rec,
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int probe_data,
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const struct err_handler_data *const data);
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/* CPU RAS interrupt handler */
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int sgi_ras_cpu_intr_handler(const struct err_record_info *err_rec,
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int probe_data,
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const struct err_handler_data *const data);
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#endif /* NRD_RAS_H */
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