arm-trusted-firmware/plat/xilinx/common/tsp/tsp_plat_setup.c
Prasad Kummari 4c7abf85df chore(zynqmp): reorganize tsp code into common path
Reorganized TSP code into common folder, updated paths in
tsp-zynqmp.mk. Handling the return value of a console registration
function.

Change-Id: I848f17c3417b3e8c8cbd2058e9642ed13d121325
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
2023-11-01 21:26:03 +05:30

70 lines
2.1 KiB
C

/*
* Copyright (c) 2014-2019, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2023, Advanced Micro Devices. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/bl_common.h>
#include <common/debug.h>
#include <drivers/console.h>
#include <plat/arm/common/plat_arm.h>
#include <platform_tsp.h>
#include <plat_private.h>
/*******************************************************************************
* Initialize the UART
******************************************************************************/
void tsp_early_platform_setup(void)
{
/*
* Register a different console than already in use to display
* messages from TSP
*/
static console_t tsp_boot_console;
int32_t rc;
rc = console_cdns_register((uintptr_t)UART_BASE,
(uint32_t)get_uart_clk(),
(uint32_t)UART_BAUDRATE,
&tsp_boot_console);
if (rc == 0) {
panic();
}
console_set_scope(&tsp_boot_console,
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
}
/*******************************************************************************
* Perform platform specific setup placeholder
******************************************************************************/
void tsp_platform_setup(void)
{
plat_arm_gic_driver_init();
plat_arm_gic_init();
}
/*******************************************************************************
* Perform the very early platform specific architectural setup here. At the
* moment this is only initializes the MMU
******************************************************************************/
void tsp_plat_arch_setup(void)
{
const mmap_region_t bl_regions[] = {
MAP_REGION_FLAT(BL32_BASE, BL32_END - BL32_BASE,
MT_MEMORY | MT_RW | MT_SECURE),
MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
MT_CODE | MT_SECURE),
MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE,
MT_RO_DATA | MT_SECURE),
MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
MT_DEVICE | MT_RW | MT_SECURE),
{0}
};
setup_page_tables(bl_regions, plat_get_mmap());
enable_mmu_el1(0);
}