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4c700c1563
Align entire TF-A to use Arm in copyright header. Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
27 lines
992 B
C
27 lines
992 B
C
/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef NEOVERSE_POSEIDON_H
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#define NEOVERSE_POSEIDON_H
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#define NEOVERSE_POSEIDON_MIDR U(0x410FD830)
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/* Neoverse Poseidon loop count for CVE-2022-23960 mitigation */
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#define NEOVERSE_POSEIDON_BHB_LOOP_COUNT U(132)
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/*******************************************************************************
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* CPU Extended Control register specific definitions.
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******************************************************************************/
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#define NEOVERSE_POSEIDON_CPUECTLR_EL1 S3_0_C15_C1_4
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/*******************************************************************************
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* CPU Power Control register specific definitions
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******************************************************************************/
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#define NEOVERSE_POSEIDON_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define NEOVERSE_POSEIDON_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
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#endif /* NEOVERSE_POSEIDON_H */
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