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Adding basic CPU library code to support the Hermes CPU. Change-Id: I61946033fe5fafb56ceb2d14d4c796d85b30457e Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
23 lines
838 B
C
23 lines
838 B
C
/*
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* Copyright (c) 2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef NEOVERSE_HERMES_H
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#define NEOVERSE_HERMES_H
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#define NEOVERSE_HERMES_MIDR U(0x410FD8E0)
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/*******************************************************************************
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* CPU Extended Control register specific definitions
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******************************************************************************/
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#define NEOVERSE_HERMES_CPUECTLR_EL1 S3_0_C15_C1_4
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/*******************************************************************************
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* CPU Power Control register specific definitions
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******************************************************************************/
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#define NEOVERSE_HERMES_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define NEOVERSE_HERMES_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
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#endif /* NEOVERSE_HERMES_H */
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