mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-09 06:13:54 +00:00
4c700c1563
Align entire TF-A to use Arm in copyright header. Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
29 lines
1,019 B
C
29 lines
1,019 B
C
/*
|
|
* Copyright (c) 2016-2019, Arm Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef CORTEX_A35_H
|
|
#define CORTEX_A35_H
|
|
|
|
#include <lib/utils_def.h>
|
|
|
|
/* Cortex-A35 Main ID register for revision 0 */
|
|
#define CORTEX_A35_MIDR U(0x410FD040)
|
|
|
|
/*******************************************************************************
|
|
* CPU Extended Control register specific definitions.
|
|
* CPUECTLR_EL1 is an implementation-specific register.
|
|
******************************************************************************/
|
|
#define CORTEX_A35_CPUECTLR_EL1 S3_1_C15_C2_1
|
|
#define CORTEX_A35_CPUECTLR_SMPEN_BIT (ULL(1) << 6)
|
|
|
|
/*******************************************************************************
|
|
* CPU Auxiliary Control register specific definitions.
|
|
******************************************************************************/
|
|
#define CORTEX_A35_CPUACTLR_EL1 S3_1_C15_C2_0
|
|
|
|
#define CORTEX_A35_CPUACTLR_EL1_ENDCCASCI (ULL(1) << 44)
|
|
|
|
#endif /* CORTEX_A35_H */
|