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1258189515
The parameter over_sampling of stm32_uart_init_s is not required as it can be computed dynamically from clock rate of the serial device and the requested baudrate. Oversampling by 8 is allowed only for higher speed (up to clock_rate / 8) to reduce the maximum receiver tolerance to clock deviation. This patch update the driver, the serial init struct and the only user, the stm32cubeprogrammer over uart support. Change-Id: I422731089730a288defeb7fa49886db65d0902b2 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
159 lines
5.2 KiB
C
159 lines
5.2 KiB
C
/*
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* Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32_UART_H
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#define STM32_UART_H
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/* UART word length */
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#define STM32_UART_WORDLENGTH_7B USART_CR1_M1
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#define STM32_UART_WORDLENGTH_8B 0x00000000U
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#define STM32_UART_WORDLENGTH_9B USART_CR1_M0
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/* UART number of stop bits */
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#define STM32_UART_STOPBITS_0_5 USART_CR2_STOP_0
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#define STM32_UART_STOPBITS_1 0x00000000U
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#define STM32_UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
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#define STM32_UART_STOPBITS_2 USART_CR2_STOP_1
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/* UART parity */
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#define STM32_UART_PARITY_NONE 0x00000000U
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#define STM32_UART_PARITY_EVEN USART_CR1_PCE
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#define STM32_UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
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/* UART transfer mode */
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#define STM32_UART_MODE_RX USART_CR1_RE
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#define STM32_UART_MODE_TX USART_CR1_TE
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#define STM32_UART_MODE_TX_RX (USART_CR1_TE | USART_CR1_RE)
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/* UART hardware flow control */
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#define STM32_UART_HWCONTROL_NONE 0x00000000U
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#define STM32_UART_HWCONTROL_RTS USART_CR3_RTSE
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#define STM32_UART_HWCONTROL_CTS USART_CR3_CTSE
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#define STM32_UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
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/* UART prescaler */
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#define STM32_UART_PRESCALER_DIV1 0x00000000U
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#define STM32_UART_PRESCALER_DIV2 0x00000001U
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#define STM32_UART_PRESCALER_DIV4 0x00000002U
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#define STM32_UART_PRESCALER_DIV6 0x00000003U
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#define STM32_UART_PRESCALER_DIV8 0x00000004U
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#define STM32_UART_PRESCALER_DIV10 0x00000005U
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#define STM32_UART_PRESCALER_DIV12 0x00000006U
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#define STM32_UART_PRESCALER_DIV16 0x00000007U
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#define STM32_UART_PRESCALER_DIV32 0x00000008U
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#define STM32_UART_PRESCALER_DIV64 0x00000009U
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#define STM32_UART_PRESCALER_DIV128 0x0000000AU
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#define STM32_UART_PRESCALER_DIV256 0x0000000BU
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#define STM32_UART_PRESCALER_NB 0x0000000CU
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/* UART fifo mode */
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#define STM32_UART_FIFOMODE_EN USART_CR1_FIFOEN
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#define STM32_UART_FIFOMODE_DIS 0x00000000U
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/* UART TXFIFO threshold level */
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#define STM32_UART_TXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U
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#define STM32_UART_TXFIFO_THRESHOLD_1QUARTERFUL USART_CR3_TXFTCFG_0
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#define STM32_UART_TXFIFO_THRESHOLD_HALFFULL USART_CR3_TXFTCFG_1
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#define STM32_UART_TXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_TXFTCFG_0 | USART_CR3_TXFTCFG_1)
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#define STM32_UART_TXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_TXFTCFG_2
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#define STM32_UART_TXFIFO_THRESHOLD_EMPTY (USART_CR3_TXFTCFG_2 | USART_CR3_TXFTCFG_0)
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/* UART RXFIFO threshold level */
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#define STM32_UART_RXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U
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#define STM32_UART_RXFIFO_THRESHOLD_1QUARTERFULL USART_CR3_RXFTCFG_0
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#define STM32_UART_RXFIFO_THRESHOLD_HALFFULL USART_CR3_RXFTCFG_1
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#define STM32_UART_RXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_RXFTCFG_0 | USART_CR3_RXFTCFG_1)
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#define STM32_UART_RXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_RXFTCFG_2
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#define STM32_UART_RXFIFO_THRESHOLD_FULL (USART_CR3_RXFTCFG_2 | USART_CR3_RXFTCFG_0)
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struct stm32_uart_init_s {
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uint32_t baud_rate; /*
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* Configures the UART communication
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* baud rate.
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*/
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uint32_t word_length; /*
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* Specifies the number of data bits
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* transmitted or received in a frame.
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* This parameter can be a value of
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* @ref STM32_UART_WORDLENGTH_*.
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*/
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uint32_t stop_bits; /*
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* Specifies the number of stop bits
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* transmitted. This parameter can be
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* a value of @ref STM32_UART_STOPBITS_*.
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*/
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uint32_t parity; /*
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* Specifies the parity mode.
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* This parameter can be a value of
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* @ref STM32_UART_PARITY_*.
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*/
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uint32_t mode; /*
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* Specifies whether the receive or
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* transmit mode is enabled or
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* disabled. This parameter can be a
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* value of @ref @ref STM32_UART_MODE_*.
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*/
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uint32_t hw_flow_control; /*
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* Specifies whether the hardware flow
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* control mode is enabled or
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* disabled. This parameter can be a
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* value of @ref STM32_UARTHWCONTROL_*.
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*/
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uint32_t one_bit_sampling; /*
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* Specifies whether a single sample
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* or three samples' majority vote is
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* selected. This parameter can be 0
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* or USART_CR3_ONEBIT.
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*/
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uint32_t prescaler; /*
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* Specifies the prescaler value used
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* to divide the UART clock source.
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* This parameter can be a value of
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* @ref STM32_UART_PRESCALER_*.
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*/
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uint32_t fifo_mode; /*
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* Specifies if the FIFO mode will be
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* used. This parameter can be a value
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* of @ref STM32_UART_FIFOMODE_*.
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*/
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uint32_t tx_fifo_threshold; /*
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* Specifies the TXFIFO threshold
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* level. This parameter can be a
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* value of @ref
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* STM32_UART_TXFIFO_THRESHOLD_*.
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*/
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uint32_t rx_fifo_threshold; /*
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* Specifies the RXFIFO threshold
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* level. This parameter can be a
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* value of @ref
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* STM32_UART_RXFIFO_THRESHOLD_*.
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*/
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};
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struct stm32_uart_handle_s {
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uint32_t base;
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uint32_t rdr_mask;
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};
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int stm32_uart_init(struct stm32_uart_handle_s *huart,
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uintptr_t base_addr,
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const struct stm32_uart_init_s *init);
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void stm32_uart_stop(uintptr_t base_addr);
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int stm32_uart_putc(struct stm32_uart_handle_s *huart, int c);
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int stm32_uart_flush(struct stm32_uart_handle_s *huart);
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int stm32_uart_getc(struct stm32_uart_handle_s *huart);
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#endif /* STM32_UART_H */
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