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https://github.com/ARM-software/arm-trusted-firmware.git
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4c0d039076
This patch reworks type usage in generic code, drivers and ARM platform files to make it more portable. The major changes done with respect to type usage are as listed below: * Use uintptr_t for storing address instead of uint64_t or unsigned long. * Review usage of unsigned long as it can no longer be assumed to be 64 bit. * Use u_register_t for register values whose width varies depending on whether AArch64 or AArch32. * Use generic C types where-ever possible. In addition to the above changes, this patch also modifies format specifiers in print invocations so that they are AArch64/AArch32 agnostic. Only files related to upcoming feature development have been reworked. Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
257 lines
9.4 KiB
C
257 lines
9.4 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CCN_PRIVATE_H__
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#define __CCN_PRIVATE_H__
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/*
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* A CCN implementation can have a maximum of 64 Request nodes with node IDs
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* from 0-63. These IDs are split across the three types of Request nodes
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* i.e. RN-F, RN-D and RN-I.
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*/
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#define MAX_RN_NODES 64
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/* Enum used to loop through the 3 types of Request nodes */
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typedef enum rn_types {
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RN_TYPE_RNF = 0,
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RN_TYPE_RNI,
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RN_TYPE_RND,
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NUM_RN_TYPES
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} rn_types_t;
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/* Macro to convert a region id to its base address */
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#define region_id_to_base(id) ((id) << 16)
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/*
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* Macro to calculate the number of master interfaces resident on a RN-I/RN-D.
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* Value of first two bits of the RN-I/D node type + 1 == Maximum number of
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* ACE-Lite or ACE-Lite+DVM interfaces supported on this node. E.g.
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*
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* 0x14 : RN-I with 1 ACE-Lite interface
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* 0x15 : RN-I with 2 ACE-Lite interfaces
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* 0x16 : RN-I with 3 ACE-Lite interfaces
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*/
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#define rn_type_id_to_master_cnt(id) (((id) & 0x3) + 1)
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/*
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* Constants used to identify a region in the programmer's view. These are
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* common for all regions.
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*/
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#define REGION_ID_LIMIT 256
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#define REGION_ID_OFFSET 0xFF00
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#define REGION_NODE_ID_SHIFT 8
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#define REGION_NODE_ID_MASK 0x7f
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#define get_node_id(id_reg) (((id_reg) >> REGION_NODE_ID_SHIFT) \
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& REGION_NODE_ID_MASK)
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#define REGION_NODE_TYPE_SHIFT 0
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#define REGION_NODE_TYPE_MASK 0x1f
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#define get_node_type(id_reg) (((id_reg) >> REGION_NODE_TYPE_SHIFT) \
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& REGION_NODE_TYPE_MASK)
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/* Common offsets of registers to enter or exit a snoop/dvm domain */
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#define DOMAIN_CTRL_STAT_OFFSET 0x0200
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#define DOMAIN_CTRL_SET_OFFSET 0x0210
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#define DOMAIN_CTRL_CLR_OFFSET 0x0220
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/*
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* Thess macros are used to determine if an operation to add or remove a Request
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* node from the snoop/dvm domain has completed. 'rn_id_map' is a bit map of
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* nodes. It was used to program the SET or CLEAR control register. The type of
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* register is specified by 'op_reg_offset'. 'status_reg' is the bit map of
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* nodes currently present in the snoop/dvm domain. 'rn_id_map' and 'status_reg'
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* are logically ANDed and the result it stored back in the 'status_reg'. There
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* are two outcomes of this operation:
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*
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* 1. If the DOMAIN_CTRL_SET_OFFSET register was programmed, then the set bits in
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* 'rn_id_map' should appear in 'status_reg' when the operation completes. So
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* after the AND operation, at some point of time 'status_reg' should equal
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* 'rn_id_map'.
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*
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* 2. If the DOMAIN_CTRL_CLR_OFFSET register was programmed, then the set bits in
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* 'rn_id_map' should disappear in 'status_reg' when the operation
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* completes. So after the AND operation, at some point of time 'status_reg'
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* should equal 0.
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*/
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#define WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(region_id, stat_reg_offset, \
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op_reg_offset, rn_id_map) \
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{ \
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unsigned long long status_reg; \
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do { \
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status_reg = ccn_reg_read((ccn_plat_desc->periphbase), \
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(region_id), \
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(stat_reg_offset)); \
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status_reg &= (rn_id_map); \
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} while ((op_reg_offset) == DOMAIN_CTRL_SET_OFFSET ? \
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(rn_id_map) != status_reg : status_reg); \
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}
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/*
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* Region ID of the Miscellaneous Node is always 0 as its located at the base of
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* the programmer's view.
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*/
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#define MN_REGION_ID 0
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#define MN_REGION_ID_START 0
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#define DEBUG_REGION_ID_START 1
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#define HNI_REGION_ID_START 8
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#define SBSX_REGION_ID_START 16
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#define HNF_REGION_ID_START 32
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#define XP_REGION_ID_START 64
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#define RNI_REGION_ID_START 128
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/* Selected register offsets from the base of a HNF region */
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#define HNF_CFG_CTRL_OFFSET 0x0000
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#define HNF_SAM_CTRL_OFFSET 0x0008
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#define HNF_PSTATE_REQ_OFFSET 0x0010
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#define HNF_PSTATE_STAT_OFFSET 0x0018
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#define HNF_SDC_STAT_OFFSET DOMAIN_CTRL_STAT_OFFSET
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#define HNF_SDC_SET_OFFSET DOMAIN_CTRL_SET_OFFSET
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#define HNF_SDC_CLR_OFFSET DOMAIN_CTRL_CLR_OFFSET
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#define HNF_AUX_CTRL_OFFSET 0x0500
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/* Selected register offsets from the base of a MN region */
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#define MN_SAR_OFFSET 0x0000
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#define MN_RNF_NODEID_OFFSET 0x0180
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#define MN_RNI_NODEID_OFFSET 0x0190
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#define MN_RND_NODEID_OFFSET 0x01A0
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#define MN_HNF_NODEID_OFFSET 0x01B0
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#define MN_HNI_NODEID_OFFSET 0x01C0
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#define MN_SN_NODEID_OFFSET 0x01D0
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#define MN_DDC_STAT_OFFSET DOMAIN_CTRL_STAT_OFFSET
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#define MN_DDC_SET_OFFSET DOMAIN_CTRL_SET_OFFSET
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#define MN_DDC_CLR_OFFSET DOMAIN_CTRL_CLR_OFFSET
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#define MN_PERIPH_ID_0_1_OFFSET 0xFE0
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#define MN_ID_OFFSET REGION_ID_OFFSET
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/* HNF System Address Map register bit masks and shifts */
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#define HNF_SAM_CTRL_SN_ID_MASK 0x7f
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#define HNF_SAM_CTRL_SN0_ID_SHIFT 0
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#define HNF_SAM_CTRL_SN1_ID_SHIFT 8
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#define HNF_SAM_CTRL_SN2_ID_SHIFT 16
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#define HNF_SAM_CTRL_TAB0_MASK 0x3fUL
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#define HNF_SAM_CTRL_TAB0_SHIFT 48
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#define HNF_SAM_CTRL_TAB1_MASK 0x3fUL
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#define HNF_SAM_CTRL_TAB1_SHIFT 56
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#define HNF_SAM_CTRL_3SN_ENB_SHIFT 32
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#define HNF_SAM_CTRL_3SN_ENB_MASK 0x01UL
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/*
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* Macro to create a value suitable for programming into a HNF SAM Control
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* register for enabling 3SN striping.
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*/
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#define MAKE_HNF_SAM_CTRL_VALUE(sn0, sn1, sn2, tab0, tab1, three_sn_en) \
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((((sn0) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN0_ID_SHIFT) | \
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(((sn1) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN1_ID_SHIFT) | \
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(((sn2) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN2_ID_SHIFT) | \
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(((tab0) & HNF_SAM_CTRL_TAB0_MASK) << HNF_SAM_CTRL_TAB0_SHIFT) | \
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(((tab1) & HNF_SAM_CTRL_TAB1_MASK) << HNF_SAM_CTRL_TAB1_SHIFT) | \
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(((three_sn_en) & HNF_SAM_CTRL_3SN_ENB_MASK) << HNF_SAM_CTRL_3SN_ENB_SHIFT))
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/* Mask to read the power state value from an HN-F P-state register */
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#define HNF_PSTATE_MASK 0xf
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/* Macro to extract the run mode from a p-state value */
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#define PSTATE_TO_RUN_MODE(pstate) (((pstate) & HNF_PSTATE_MASK) >> 2)
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/*
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* Helper macro that iterates through a given bit map. In each iteration,
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* it returns the position of the set bit.
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* It can be used by other utility macros to iterates through all nodes
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* or masters given a bit map of them.
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*/
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#define FOR_EACH_BIT(bit_pos, bit_map) \
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for (bit_pos = __builtin_ctzll(bit_map); \
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bit_map; \
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bit_map &= ~(1UL << bit_pos), \
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bit_pos = __builtin_ctzll(bit_map))
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/*
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* Utility macro that iterates through a bit map of node IDs. In each
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* iteration, it returns the ID of the next present node in the bit map. Node
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* ID of a present node == Position of set bit == Number of zeroes trailing the
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* bit.
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*/
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#define FOR_EACH_PRESENT_NODE_ID(node_id, bit_map) \
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FOR_EACH_BIT(node_id, bit_map)
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/*
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* Helper function to return number of set bits in bitmap
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*/
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static inline unsigned int count_set_bits(unsigned long long bitmap)
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{
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unsigned int count = 0;
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for (; bitmap; bitmap &= bitmap - 1)
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++count;
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return count;
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}
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/*
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* Utility macro that iterates through a bit map of node IDs. In each iteration,
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* it returns the ID of the next present region corresponding to a node present
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* in the bit map. Region ID of a present node is in between passed region id
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* and region id + number of set bits in the bitmap i.e. the number of present
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* nodes.
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*/
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#define FOR_EACH_PRESENT_REGION_ID(region_id, bit_map) \
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for (unsigned long long region_id_limit = count_set_bits(bit_map) \
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+ region_id; \
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region_id < region_id_limit; \
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region_id++)
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/*
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* Same macro as FOR_EACH_PRESENT_NODE, but renamed to indicate it traverses
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* through a bit map of master interfaces.
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*/
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#define FOR_EACH_PRESENT_MASTER_INTERFACE(iface_id, bit_map) \
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FOR_EACH_BIT(iface_id, bit_map)
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/*
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* Macro that returns the node id bit map for the Miscellaneous Node
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*/
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#define CCN_GET_MN_NODEID_MAP(periphbase) \
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(1 << get_node_id(ccn_reg_read(periphbase, MN_REGION_ID, \
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REGION_ID_OFFSET)))
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/*
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* This macro returns the bitmap of Home nodes on the basis of the
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* 'mn_hn_id_reg_offset' parameter from the Miscellaneous node's (MN)
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* programmer's view. The MN has a register which carries the bitmap of present
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* Home nodes of each type i.e. HN-Fs, HN-Is & HN-Ds.
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*/
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#define CCN_GET_HN_NODEID_MAP(periphbase, mn_hn_id_reg_offset) \
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ccn_reg_read(periphbase, MN_REGION_ID, mn_hn_id_reg_offset)
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#endif /* __CCN_PRIVATE_H__ */
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