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4a079c752b
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
71 lines
1.3 KiB
ArmAsm
71 lines
1.3 KiB
ArmAsm
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_MACROS_S
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#define PLAT_MACROS_S
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#include <drivers/arm/gicv2.h>
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#include <platform_def.h>
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.section .rodata.gic_reg_name, "aS"
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gicc_regs:
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.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
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gicd_pend_reg:
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.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n"
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newline:
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.asciz "\n"
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spacer:
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.asciz ":\t\t0x"
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/* ---------------------------------------------
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* The below required platform porting macro
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* prints out relevant GIC and CCI registers
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* whenever an unhandled exception is taken in
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* BL31.
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* Clobbers: x0 - x10, x16, x17, sp
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* ---------------------------------------------
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*/
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.macro plat_crash_print_regs
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/* GICC registers */
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mov_imm x17, GXBB_GICC_BASE
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adr x6, gicc_regs
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ldr w8, [x17, #GICC_HPPIR]
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ldr w9, [x17, #GICC_AHPPIR]
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ldr w10, [x17, #GICC_CTLR]
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bl str_in_crash_buf_print
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/* GICD registers */
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mov_imm x16, GXBB_GICD_BASE
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add x7, x16, #GICD_ISPENDR
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adr x4, gicd_pend_reg
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bl asm_print_str
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gicd_ispendr_loop:
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sub x4, x7, x16
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cmp x4, #0x280
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b.eq exit_print_gic_regs
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bl asm_print_hex
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adr x4, spacer
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bl asm_print_str
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ldr x4, [x7], #8
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bl asm_print_hex
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adr x4, newline
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bl asm_print_str
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b gicd_ispendr_loop
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exit_print_gic_regs:
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.endm
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#endif /* PLAT_MACROS_S */
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