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https://github.com/ARM-software/arm-trusted-firmware.git
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f1722b693d
This patch fixes up the AArch64 assembly code to use adrp/adr instructions instead of ldr instruction for reference to symbols. This allows these assembly sequences to be Position Independant. Note that the the reference to sizes have been replaced with calculation of size at runtime. This is because size is a constant value and does not depend on execution address and using PC relative instructions for loading them makes them relative to execution address. Also we cannot use `ldr` instruction to load size as it generates a dynamic relocation entry which must *not* be fixed up and it is difficult for a dynamic loader to differentiate which entries need to be skipped. Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
36 lines
698 B
ArmAsm
36 lines
698 B
ArmAsm
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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.globl rom_lib_init
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.extern __DATA_RAM_START__, __DATA_ROM_START__, __DATA_RAM_END__
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.extern memset, memcpy
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rom_lib_init:
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cmp w0, #1
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mov w0, #0
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b.le 1f
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ret
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1: stp x29, x30, [sp, #-16]!
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adrp x0, __DATA_RAM_START__
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adrp x1, __DATA_ROM_START__
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add x1, x1, :lo12:__DATA_ROM_START__
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adrp x2, __DATA_RAM_END__
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add x2, x2, :lo12:__DATA_RAM_END__
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sub x2, x2, x0
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bl memcpy
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adrp x0,__BSS_START__
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add x0, x0, :lo12:__BSS_START__
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mov x1, #0
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adrp x2, __BSS_END__
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add x2, x2, :lo12:__BSS_END__
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sub x2, x2, x0
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bl memset
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ldp x29, x30, [sp], #16
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mov w0, #1
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ret
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