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https://github.com/ARM-software/arm-trusted-firmware.git
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48ab390444
Add BL2 support by default. Move the legacy mode behind the RESET_TO_BL31 define. Cc: Sumit Garg <sumit.garg@linaro.org> Cc: Masahisa Kojima <masahisa.kojima@linaro.org> Cc: Manish V Badarkhe <manish.badarkhe@arm.com> Cc: Leonardo Sandoval <leonardo.sandoval@linaro.org> Change-Id: Ic490745a7e8f6114172733428ebd6bd6adfcc1ec Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
142 lines
3 KiB
C
142 lines
3 KiB
C
/*
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* Copyright (c) 2022, Socionext Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <stdint.h>
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#include <drivers/io/io_block.h>
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#include <drivers/io/io_driver.h>
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#include <drivers/io/io_fip.h>
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#include <drivers/io/io_memmap.h>
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <tools_share/firmware_image_package.h>
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#include <platform_def.h>
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#include <sq_common.h>
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static const io_dev_connector_t *sq_fip_dev_con;
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static uintptr_t sq_fip_dev_handle;
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static const io_dev_connector_t *sq_backend_dev_con;
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static uintptr_t sq_backend_dev_handle;
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static io_block_spec_t sq_fip_spec = {
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.offset = PLAT_SQ_FIP_IOBASE, /* FIP Image is at 5MB offset on memory-mapped NOR flash */
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.length = PLAT_SQ_FIP_MAXSIZE, /* Expected maximum FIP image size */
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};
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static const io_uuid_spec_t sq_bl2_spec = {
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.uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
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};
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static const io_uuid_spec_t sq_bl31_spec = {
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.uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31,
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};
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static const io_uuid_spec_t sq_bl32_spec = {
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.uuid = UUID_SECURE_PAYLOAD_BL32,
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};
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static const io_uuid_spec_t sq_bl33_spec = {
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.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
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};
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struct sq_io_policy {
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uintptr_t *dev_handle;
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uintptr_t image_spec;
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uintptr_t init_params;
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};
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static const struct sq_io_policy sq_io_policies[] = {
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[FIP_IMAGE_ID] = {
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.dev_handle = &sq_backend_dev_handle,
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.image_spec = (uintptr_t)&sq_fip_spec,
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},
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[BL2_IMAGE_ID] = {
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.dev_handle = &sq_fip_dev_handle,
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.image_spec = (uintptr_t)&sq_bl2_spec,
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.init_params = FIP_IMAGE_ID,
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},
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[BL31_IMAGE_ID] = {
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.dev_handle = &sq_fip_dev_handle,
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.image_spec = (uintptr_t)&sq_bl31_spec,
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.init_params = FIP_IMAGE_ID,
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},
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[BL32_IMAGE_ID] = {
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.dev_handle = &sq_fip_dev_handle,
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.image_spec = (uintptr_t)&sq_bl32_spec,
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.init_params = FIP_IMAGE_ID,
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},
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[BL33_IMAGE_ID] = {
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.dev_handle = &sq_fip_dev_handle,
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.image_spec = (uintptr_t)&sq_bl33_spec,
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.init_params = FIP_IMAGE_ID,
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},
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};
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static int sq_io_memmap_setup(void)
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{
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int ret;
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ret = mmap_add_dynamic_region(sq_fip_spec.offset, sq_fip_spec.offset,
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sq_fip_spec.length, MT_RO_DATA | MT_SECURE);
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if (ret) {
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return ret;
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}
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ret = register_io_dev_memmap(&sq_backend_dev_con);
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if (ret) {
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return ret;
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}
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return io_dev_open(sq_backend_dev_con, 0, &sq_backend_dev_handle);
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}
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static int sq_io_fip_setup(void)
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{
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int ret;
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ret = register_io_dev_fip(&sq_fip_dev_con);
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if (ret) {
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return ret;
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}
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return io_dev_open(sq_fip_dev_con, 0, &sq_fip_dev_handle);
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}
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int sq_io_setup(void)
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{
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int ret;
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ret = sq_io_memmap_setup();
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if (ret) {
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return ret;
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}
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ret = sq_io_fip_setup();
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if (ret) {
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return ret;
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}
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return 0;
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}
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int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
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uintptr_t *image_spec)
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{
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uintptr_t init_params;
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assert(image_id < ARRAY_SIZE(sq_io_policies));
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*dev_handle = *sq_io_policies[image_id].dev_handle;
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*image_spec = sq_io_policies[image_id].image_spec;
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init_params = sq_io_policies[image_id].init_params;
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return io_dev_init(*dev_handle, init_params);
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}
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