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The TEGRA_GICv2_SOURCES contains the list of GIC sources required to compile the GICv2 support for platforms. This patch includes the TEGRA_GICv2_SOURCES macro from individual makefiles to allow future platforms to use suport for GICv3. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I429b1a0c7764ab370675f873a50cecda871110cb
35 lines
1,015 B
Makefile
35 lines
1,015 B
Makefile
#
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# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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TZDRAM_BASE := 0xF5C00000
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$(eval $(call add_define,TZDRAM_BASE))
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PLATFORM_CLUSTER_COUNT := 1
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$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
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PLATFORM_MAX_CPUS_PER_CLUSTER := 2
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$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
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MAX_XLAT_TABLES := 3
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$(eval $(call add_define,MAX_XLAT_TABLES))
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MAX_MMAP_REGIONS := 8
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$(eval $(call add_define,MAX_MMAP_REGIONS))
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# platform files
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PLAT_INCLUDES += -Iplat/nvidia/tegra/include/t132
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BL31_SOURCES += ${TEGRA_GICv2_SOURCES} \
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drivers/ti/uart/aarch64/16550_console.S \
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lib/cpus/aarch64/denver.S \
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${TEGRA_DRIVERS}/flowctrl/flowctrl.c \
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${TEGRA_DRIVERS}/memctrl/memctrl_v1.c \
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${TEGRA_DRIVERS}/pmc/pmc.c \
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${SOC_DIR}/plat_psci_handlers.c \
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${SOC_DIR}/plat_sip_calls.c \
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${SOC_DIR}/plat_setup.c \
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${SOC_DIR}/plat_secondary.c
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