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46cc41d559
Current RAS framework in TF-A only supports handling errors originating from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all lower Els. To make the current design of RAS explicit, rename this macro to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when switching to NS world. Note: I am unaware of any platform which traps errors originating in Secure world to EL3, if there is any such platform then it need to be explicitly implemented in TF-A Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750
78 lines
3.1 KiB
C
78 lines
3.1 KiB
C
/*
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* Copyright (C) 2019 Repk repk@triplefau.lt
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#include <inttypes.h>
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#include <stdint.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <arch_helpers.h>
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#include <plat/common/platform.h>
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#include <bl31/ea_handle.h>
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#define A53_SERR_INT_AXI_SLVERR_ON_EXTERNAL_ACCESS 0xbf000002
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/*
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* This source file with custom plat_ea_handler function is compiled only when
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* building TF-A with compile option HANDLE_EA_EL3_FIRST_NS=1
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*/
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void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
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void *handle, uint64_t flags)
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{
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unsigned int level = (unsigned int)GET_EL(read_spsr_el3());
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/*
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* Asynchronous External Abort with syndrome 0xbf000002 on Cortex A53
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* core means SError interrupt caused by AXI SLVERR on external access.
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*
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* In most cases this indicates a bug in U-Boot or Linux kernel driver
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* pci-aardvark.c which implements access to A3700 PCIe config space.
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* Driver does not wait for PCIe PIO transfer completion and try to
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* start a new PCIe PIO transfer while previous has not finished yet.
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* A3700 PCIe controller in this case sends SLVERR via AXI which results
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* in a fatal Asynchronous SError interrupt on Cortex A53 CPU.
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*
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* Following patches fix that bug in U-Boot and Linux kernel drivers:
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* https://source.denx.de/u-boot/u-boot/-/commit/eccbd4ad8e4e182638eafbfb87ac139c04f24a01
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* https://git.kernel.org/stable/c/f18139966d072dab8e4398c95ce955a9742e04f7
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*
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* As a hacky workaround for unpatched U-Boot and Linux kernel drivers
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* ignore all asynchronous aborts with that syndrome value received on
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* CPU from level lower than EL3.
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*
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* Because these aborts are delivered on CPU asynchronously, they are
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* imprecise and we cannot check the real reason of abort and neither
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* who and why sent this abort. We expect that on A3700 it is always
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* PCIe controller.
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*
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* Hence ignoring all aborts with this syndrome value is just a giant
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* hack that we need only because of bugs in old U-Boot and Linux kernel
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* versions and because it was decided that TF-A would implement this
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* hack for U-Boot and Linux kernel it in this way. New patched U-Boot
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* and kernel versions do not need it anymore.
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*
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* Links to discussion about this workaround:
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* https://lore.kernel.org/linux-pci/20190316161243.29517-1-repk@triplefau.lt/
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* https://lore.kernel.org/linux-pci/971be151d24312cc533989a64bd454b4@www.loen.fr/
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* https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1541
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*/
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if (level < MODE_EL3 && ea_reason == ERROR_EA_ASYNC &&
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syndrome == A53_SERR_INT_AXI_SLVERR_ON_EXTERNAL_ACCESS) {
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ERROR_NL();
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ERROR("Ignoring Asynchronous External Abort with"
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" syndrome 0x%" PRIx64 " received on 0x%lx from %s\n",
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syndrome, read_mpidr_el1(), get_el_str(level));
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ERROR("SError interrupt: AXI SLVERR on external access\n");
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ERROR("This indicates a bug in pci-aardvark.c driver\n");
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ERROR("Please update U-Boot/Linux to the latest version\n");
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ERROR_NL();
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console_flush();
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return;
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}
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plat_default_ea_handler(ea_reason, syndrome, cookie, handle, flags);
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}
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