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![]() This patch adds an option to the ARM common platforms to load BL31 in the TZC secured DRAM instead of the default secure SRAM. To enable this feature, set `ARM_BL31_IN_DRAM` to 1 in build options. If TSP is present, then setting this option also sets the TSP location to DRAM and ignores the `ARM_TSP_RAM_LOCATION` build flag. To use this feature, BL2 platform code must map in the DRAM used by BL31. The macro ARM_MAP_BL31_SEC_DRAM is provided for this purpose. Currently, only the FVP BL2 platform code maps in this DRAM. Change-Id: If5f7cc9deb569cfe68353a174d4caa48acd78d67 |
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diagrams | ||
plat | ||
spd | ||
auth-framework.md | ||
change-log.md | ||
cpu-specific-build-macros.md | ||
firmware-design.md | ||
firmware-update.md | ||
interrupt-framework-design.md | ||
platform-migration-guide.md | ||
porting-guide.md | ||
psci-pd-tree.md | ||
reset-design.md | ||
rt-svc-writers-guide.md | ||
trusted-board-boot.md | ||
user-guide.md |