mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-18 02:24:18 +00:00
7af2131787
This platform supports multiple SoCs. The next SoC will still keep quite similar architecture, but the memory base will be changed. The ENABLE_PIE improves the maintainability and usability. You can reuse a single set of BL images for other SoC/board without re-compiling TF-A at all. This will also keep the code cleaner because it avoids #ifdef around various base addresses. By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really position-independent now. You can load them anywhere irrespective of their link address. Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
71 lines
2 KiB
C
71 lines
2 KiB
C
/*
|
|
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef UNIPHIER_H
|
|
#define UNIPHIER_H
|
|
|
|
#include <stdint.h>
|
|
#include <string.h>
|
|
|
|
unsigned int uniphier_get_soc_type(void);
|
|
unsigned int uniphier_get_soc_model(void);
|
|
unsigned int uniphier_get_soc_revision(void);
|
|
unsigned int uniphier_get_soc_id(void);
|
|
|
|
#define UNIPHIER_SOC_LD11 0
|
|
#define UNIPHIER_SOC_LD20 1
|
|
#define UNIPHIER_SOC_PXS3 2
|
|
#define UNIPHIER_SOC_UNKNOWN 0xffffffff
|
|
|
|
unsigned int uniphier_get_boot_device(unsigned int soc);
|
|
|
|
#define UNIPHIER_BOOT_DEVICE_EMMC 0
|
|
#define UNIPHIER_BOOT_DEVICE_NAND 1
|
|
#define UNIPHIER_BOOT_DEVICE_NOR 2
|
|
#define UNIPHIER_BOOT_DEVICE_USB 3
|
|
#define UNIPHIER_BOOT_DEVICE_RSV 0xffffffff
|
|
|
|
unsigned int uniphier_get_boot_master(unsigned int soc);
|
|
|
|
#define UNIPHIER_BOOT_MASTER_THIS 0
|
|
#define UNIPHIER_BOOT_MASTER_SCP 1
|
|
#define UNIPHIER_BOOT_MASTER_EXT 2
|
|
|
|
void uniphier_console_setup(void);
|
|
|
|
struct io_block_dev_spec;
|
|
int uniphier_emmc_init(struct io_block_dev_spec **block_dev_spec);
|
|
int uniphier_nand_init(struct io_block_dev_spec **block_dev_spec);
|
|
int uniphier_usb_init(unsigned int soc,
|
|
struct io_block_dev_spec **block_dev_spec);
|
|
|
|
int uniphier_io_setup(unsigned int soc, uintptr_t mem_base);
|
|
|
|
void uniphier_init_image_descs(uintptr_t mem_base);
|
|
struct image_info;
|
|
struct image_info *uniphier_get_image_info(unsigned int image_id);
|
|
|
|
int uniphier_scp_is_running(void);
|
|
void uniphier_scp_start(uint32_t scp_base);
|
|
void uniphier_scp_open_com(void);
|
|
void uniphier_scp_system_off(void);
|
|
void uniphier_scp_system_reset(void);
|
|
|
|
void uniphier_mmap_setup(void);
|
|
|
|
void uniphier_cci_init(unsigned int soc);
|
|
void uniphier_cci_enable(void);
|
|
void uniphier_cci_disable(void);
|
|
|
|
void uniphier_gic_driver_init(unsigned int soc);
|
|
void uniphier_gic_init(void);
|
|
void uniphier_gic_cpuif_enable(void);
|
|
void uniphier_gic_cpuif_disable(void);
|
|
void uniphier_gic_pcpu_init(void);
|
|
|
|
unsigned int uniphier_calc_core_pos(u_register_t mpidr);
|
|
|
|
#endif /* UNIPHIER_H */
|