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6dcf3e7744
When the Arm(R) Ethos(TM)-N NPU driver is built with TZMP1 support, the NPU should use the firmware that has been loaded into the protected memory by BL2. The Linux Kernel NPU driver in the non-secure world is not allowed to configure the NPU to do this in a TZMP1 build so the SiP service will now configure the NPU to boot with the firmware in the protected memory. BREAKING CHANGE: The Linux Kernel NPU driver can no longer directly configure and boot the NPU in a TZMP1 build. The API version has therefore been given a major version bump with this change. Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I65d00f54b3ade3665d7941e270da7a3dec02281a
82 lines
2.5 KiB
C
82 lines
2.5 KiB
C
/*
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* Copyright (c) 2021-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ETHOSN_H
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#define ETHOSN_H
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#include <lib/smccc.h>
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/* Function numbers */
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#define ETHOSN_FNUM_VERSION U(0x50)
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#define ETHOSN_FNUM_IS_SEC U(0x51)
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#define ETHOSN_FNUM_HARD_RESET U(0x52)
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#define ETHOSN_FNUM_SOFT_RESET U(0x53)
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#define ETHOSN_FNUM_IS_SLEEPING U(0x54)
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#define ETHOSN_FNUM_GET_FW_PROP U(0x55)
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#define ETHOSN_FNUM_BOOT_FW U(0x56)
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/* 0x57-0x5F reserved for future use */
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/* Properties for ETHOSN_FNUM_TZMP_GET_FW_PROP */
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#define ETHOSN_FW_PROP_VERSION U(0xF00)
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#define ETHOSN_FW_PROP_MEM_INFO U(0xF01)
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#define ETHOSN_FW_PROP_OFFSETS U(0xF02)
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#define ETHOSN_FW_PROP_VA_MAP U(0xF03)
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/* SMC64 function IDs */
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#define ETHOSN_FID_64(func_num) U(0xC2000000 | func_num)
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#define ETHOSN_FID_VERSION_64 ETHOSN_FID_64(ETHOSN_FNUM_VERSION)
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#define ETHOSN_FID_IS_SEC_64 ETHOSN_FID_64(ETHOSN_FNUM_IS_SEC)
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#define ETHOSN_FID_HARD_RESET_64 ETHOSN_FID_64(ETHOSN_FNUM_HARD_RESET)
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#define ETHOSN_FID_SOFT_RESET_64 ETHOSN_FID_64(ETHOSN_FNUM_SOFT_RESET)
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/* SMC32 function IDs */
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#define ETHOSN_FID_32(func_num) U(0x82000000 | func_num)
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#define ETHOSN_FID_VERSION_32 ETHOSN_FID_32(ETHOSN_FNUM_VERSION)
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#define ETHOSN_FID_IS_SEC_32 ETHOSN_FID_32(ETHOSN_FNUM_IS_SEC)
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#define ETHOSN_FID_HARD_RESET_32 ETHOSN_FID_32(ETHOSN_FNUM_HARD_RESET)
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#define ETHOSN_FID_SOFT_RESET_32 ETHOSN_FID_32(ETHOSN_FNUM_SOFT_RESET)
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#define ETHOSN_NUM_SMC_CALLS 8
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/* Macro to identify function calls */
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#define ETHOSN_FID_MASK U(0xFFF0)
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#define ETHOSN_FID_VALUE U(0x50)
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#define is_ethosn_fid(_fid) (((_fid) & ETHOSN_FID_MASK) == ETHOSN_FID_VALUE)
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/* Service version */
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#define ETHOSN_VERSION_MAJOR U(3)
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#define ETHOSN_VERSION_MINOR U(0)
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/* Return codes for function calls */
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#define ETHOSN_SUCCESS 0
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#define ETHOSN_NOT_SUPPORTED -1
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/* -2 Reserved for NOT_REQUIRED */
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#define ETHOSN_INVALID_PARAMETER -3
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#define ETHOSN_FAILURE -4
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#define ETHOSN_UNKNOWN_CORE_ADDRESS -5
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#define ETHOSN_UNKNOWN_ALLOCATOR_IDX -6
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#define ETHOSN_INVALID_CONFIGURATION -7
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#define ETHOSN_INVALID_STATE -8
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/*
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* Argument types for soft and hard resets to indicate whether to reset
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* and reconfigure the NPU or only halt it
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*/
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#define ETHOSN_RESET_TYPE_FULL U(0)
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#define ETHOSN_RESET_TYPE_HALT U(1)
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int ethosn_smc_setup(void);
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uintptr_t ethosn_smc_handler(uint32_t smc_fid,
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u_register_t core_addr,
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u_register_t asset_alloc_idx,
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u_register_t reset_type,
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u_register_t x4,
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void *cookie,
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void *handle,
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u_register_t flags);
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#endif /* ETHOSN_H */
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