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313b776f85
When the Arm(R) Ethos(TM)-N NPU driver is built with TZMP1 support, it will now validate the NPU firmware binary that BL2 is expected to load into the protected memory location specified by ARM_ETHOSN_NPU_IMAGE_BASE. Juno has been updated with a new BL31 memory mapping to allow the SiP service to read the protected memory that contains the NPU firmware binary. Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I633256ab7dd4f8f5a6f864c8c98a66bf9dfc37f3
36 lines
828 B
C
36 lines
828 B
C
/*
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* Copyright (c) 2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <stdint.h>
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/*
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* Big FW binary structure.
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* Must be kept in sync with the Arm(R) Ethos(TM)-N NPU firmware binary layout.
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*/
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struct ethosn_big_fw {
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uint32_t fw_magic;
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uint32_t fw_ver_major;
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uint32_t fw_ver_minor;
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uint32_t fw_ver_patch;
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uint32_t arch_min;
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uint32_t arch_max;
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uint32_t offset;
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uint32_t size;
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uint32_t code_offset;
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uint32_t code_size;
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uint32_t ple_offset;
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uint32_t ple_size;
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uint32_t vector_table_offset;
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uint32_t vector_table_size;
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uint32_t unpriv_stack_offset;
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uint32_t unpriv_stack_size;
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uint32_t priv_stack_offset;
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uint32_t priv_stack_size;
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} __packed;
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bool ethosn_big_fw_verify_header(const struct ethosn_big_fw *big_fw,
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uint32_t npu_arch_ver);
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