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42d4d3baac
BL2_AT_EL3 is an overloaded macro which has two uses: 1. When BL2 is entry point into TF-A(no BL1) 2. When BL2 is running at EL3 exception level These two scenarios are not exactly same even though first implicitly means second to be true. To distinguish between these two use cases we introduce new macros. BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2. Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where BL2 runs at EL3 (including four world systems). BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the repository. Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
231 lines
5.8 KiB
ArmAsm
231 lines
5.8 KiB
ArmAsm
/*
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* Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CPU_MACROS_S
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#define CPU_MACROS_S
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#include <arch.h>
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#include <lib/cpus/errata_report.h>
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#if defined(IMAGE_BL1) || defined(IMAGE_BL32) \
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|| (defined(IMAGE_BL2) && RESET_TO_BL2)
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#define IMAGE_AT_EL3
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#endif
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#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
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(MIDR_PN_MASK << MIDR_PN_SHIFT)
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/* The number of CPU operations allowed */
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#define CPU_MAX_PWR_DWN_OPS 2
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/* Special constant to specify that CPU has no reset function */
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#define CPU_NO_RESET_FUNC 0
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/* Word size for 32-bit CPUs */
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#define CPU_WORD_SIZE 4
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/*
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* Whether errata status needs reporting. Errata status is printed in debug
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* builds for both BL1 and BL32 images.
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*/
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#if (defined(IMAGE_BL1) || defined(IMAGE_BL32)) && DEBUG
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# define REPORT_ERRATA 1
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#else
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# define REPORT_ERRATA 0
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#endif
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.equ CPU_MIDR_SIZE, CPU_WORD_SIZE
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.equ CPU_RESET_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_PWR_DWN_OPS_SIZE, CPU_WORD_SIZE * CPU_MAX_PWR_DWN_OPS
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.equ CPU_ERRATA_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_ERRATA_LOCK_SIZE, CPU_WORD_SIZE
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.equ CPU_ERRATA_PRINTED_SIZE, CPU_WORD_SIZE
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#ifndef IMAGE_AT_EL3
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.equ CPU_RESET_FUNC_SIZE, 0
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#endif
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/* The power down core and cluster is needed only in BL32 */
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#ifndef IMAGE_BL32
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.equ CPU_PWR_DWN_OPS_SIZE, 0
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#endif
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/* Fields required to print errata status */
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#if !REPORT_ERRATA
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.equ CPU_ERRATA_FUNC_SIZE, 0
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#endif
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/* Only BL32 requires mutual exclusion and printed flag. */
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#if !(REPORT_ERRATA && defined(IMAGE_BL32))
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.equ CPU_ERRATA_LOCK_SIZE, 0
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.equ CPU_ERRATA_PRINTED_SIZE, 0
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#endif
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/*
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* Define the offsets to the fields in cpu_ops structure.
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* Every offset is defined based on the offset and size of the previous
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* field.
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*/
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.equ CPU_MIDR, 0
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.equ CPU_RESET_FUNC, CPU_MIDR + CPU_MIDR_SIZE
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.equ CPU_PWR_DWN_OPS, CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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.equ CPU_ERRATA_FUNC, CPU_PWR_DWN_OPS + CPU_PWR_DWN_OPS_SIZE
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.equ CPU_ERRATA_LOCK, CPU_ERRATA_FUNC + CPU_ERRATA_FUNC_SIZE
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.equ CPU_ERRATA_PRINTED, CPU_ERRATA_LOCK + CPU_ERRATA_LOCK_SIZE
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.equ CPU_OPS_SIZE, CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
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/*
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* Write given expressions as words
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*
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* _count:
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* Write at least _count words. If the given number of expressions
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* is less than _count, repeat the last expression to fill _count
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* words in total
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* _rest:
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* Optional list of expressions. _this is for parameter extraction
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* only, and has no significance to the caller
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*
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* Invoked as:
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* fill_constants 2, foo, bar, blah, ...
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*/
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.macro fill_constants _count:req, _this, _rest:vararg
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.ifgt \_count
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/* Write the current expression */
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.ifb \_this
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.error "Nothing to fill"
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.endif
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.word \_this
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/* Invoke recursively for remaining expressions */
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.ifnb \_rest
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fill_constants \_count-1, \_rest
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.else
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fill_constants \_count-1, \_this
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.endif
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.endif
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.endm
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/*
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* Declare CPU operations
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*
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* _name:
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* Name of the CPU for which operations are being specified
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* _midr:
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* Numeric value expected to read from CPU's MIDR
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* _resetfunc:
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* Reset function for the CPU. If there's no CPU reset function,
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* specify CPU_NO_RESET_FUNC
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* _power_down_ops:
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* Comma-separated list of functions to perform power-down
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* operatios on the CPU. At least one, and up to
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* CPU_MAX_PWR_DWN_OPS number of functions may be specified.
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* Starting at power level 0, these functions shall handle power
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* down at subsequent power levels. If there aren't exactly
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* CPU_MAX_PWR_DWN_OPS functions, the last specified one will be
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* used to handle power down at subsequent levels
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*/
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.macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \
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_power_down_ops:vararg
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.section .cpu_ops, "a"
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.align 2
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.type cpu_ops_\_name, %object
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.word \_midr
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#if defined(IMAGE_AT_EL3)
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.word \_resetfunc
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#endif
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#ifdef IMAGE_BL32
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/* Insert list of functions */
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fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops
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#endif
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#if REPORT_ERRATA
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.ifndef \_name\()_cpu_str
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/*
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* Place errata reported flag, and the spinlock to arbitrate access to
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* it in the data section.
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*/
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.pushsection .data
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define_asm_spinlock \_name\()_errata_lock
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\_name\()_errata_reported:
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.word 0
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.popsection
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/* Place CPU string in rodata */
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.pushsection .rodata
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\_name\()_cpu_str:
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.asciz "\_name"
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.popsection
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.endif
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/*
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* Mandatory errata status printing function for CPUs of
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* this class.
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*/
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.word \_name\()_errata_report
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#ifdef IMAGE_BL32
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/* Pointers to errata lock and reported flag */
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.word \_name\()_errata_lock
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.word \_name\()_errata_reported
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#endif
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#endif
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.endm
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#if REPORT_ERRATA
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/*
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* Print status of a CPU errata
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*
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* _chosen:
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* Identifier indicating whether or not a CPU errata has been
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* compiled in.
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* _cpu:
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* Name of the CPU
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* _id:
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* Errata identifier
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* _rev_var:
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* Register containing the combined value CPU revision and variant
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* - typically the return value of cpu_get_rev_var
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*/
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.macro report_errata _chosen, _cpu, _id, _rev_var=r4
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/* Stash a string with errata ID */
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.pushsection .rodata
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\_cpu\()_errata_\_id\()_str:
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.asciz "\_id"
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.popsection
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/* Check whether errata applies */
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mov r0, \_rev_var
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bl check_errata_\_id
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.ifeq \_chosen
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/*
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* Errata workaround has not been compiled in. If the errata would have
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* applied had it been compiled in, print its status as missing.
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*/
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cmp r0, #0
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movne r0, #ERRATA_MISSING
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.endif
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ldr r1, =\_cpu\()_cpu_str
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ldr r2, =\_cpu\()_errata_\_id\()_str
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bl errata_print_msg
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.endm
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#endif
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/*
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* Helper macro that reads the part number of the current CPU and jumps
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* to the given label if it matches the CPU MIDR provided.
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*
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* Clobbers: r0-r1
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*/
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.macro jump_if_cpu_midr _cpu_midr, _label
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ldcopr r0, MIDR
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ubfx r0, r0, #MIDR_PN_SHIFT, #12
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ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
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cmp r0, r1
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beq \_label
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.endm
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#endif /* CPU_MACROS_S */
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