Arvind Ram Prakash 42d4d3baac refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 ... BL2_AT_EL3 is an overloaded macro which has two uses: 1. When BL2 is entry point into TF-A(no BL1) 2. When BL2 is running at EL3 exception level These two scenarios are not exactly same even though first implicitly means second to be true. To distinguish between these two use cases we introduce new macros. BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2. Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where BL2 runs at EL3 (including four world systems). BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the repository. Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>		2023-03-15 11:43:14 +00:00
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arch.h	feat(debug): add AARCH32 CP15 fault registers	2022-10-03 14:06:25 +02:00
arch_features.h	refactor(trf): enable FEAT_TRF for FEAT_STATE_CHECKED	2023-02-27 18:04:14 +00:00
arch_helpers.h	feat(gic): add APIs to raise NS and S-EL1 SGIs	2022-09-14 16:08:29 +02:00
asm_macros.S	arch: Enable FEAT_SB for supported non-Armv8.5-A platforms	2021-03-18 12:34:34 +01:00
assert_macros.S	Reorganize architecture-dependent header files	2019-01-04 10:43:16 +00:00
console_macros.S	console: update skeleton	2019-07-16 13:01:02 +00:00
el3_common_macros.S	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
smccc_helpers.h	Changes to support updated register usage in SMCCC v1.2	2019-11-26 12:56:30 -06:00
smccc_macros.S	aarch32: stop speculative execution past exception returns	2020-03-01 06:44:30 -06:00