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https://github.com/ARM-software/arm-trusted-firmware.git
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42488064e1
When fdt_add_reserved_memory() is called to add a memory region, we unconditionally add a node for that region. However there might be an existing region node in the DT already, or there might be an overlapping region. The Linux kernel will complain in those cases. Cover the simple case of the region already existing in the DT, as this is what we actually see on the Allwinner H616: The mainline DT contains a node reserving the memory for TF-A, in case the DT changed by TF-A itself is not given to the kernel. Our code always adds a region, making the kernel complain - albeit without further consequences. Covering all cases of overlapping regions would blow up the generic DT code too much, so just add a simple check for an existing region completely containing the to-be-added region, simply bailing out in this case. This prevents the kernel warning for the Allwinner H616. This code requires a function from fdt_wrappers.c, so we have to include that file for platforms that use the fdt_add_reserved_memory() function (rpi4 and versal2). Change-Id: I98404889163316addbb42130d7177f1a21c8be06 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
128 lines
3.5 KiB
Makefile
128 lines
3.5 KiB
Makefile
# Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
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# Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved.
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# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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PLAT_PATH := plat/amd/versal2
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# A78 Erratum for SoC
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ERRATA_A78_AE_1941500 := 1
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ERRATA_A78_AE_1951502 := 1
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ERRATA_A78_AE_2376748 := 1
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ERRATA_A78_AE_2395408 := 1
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ERRATA_ABI_SUPPORT := 1
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# Platform Supports Armv8.2 extensions
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ARM_ARCH_MAJOR := 8
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ARM_ARCH_MINOR := 2
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override PROGRAMMABLE_RESET_ADDRESS := 1
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PSCI_EXTENDED_STATE_ID := 1
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SEPARATE_CODE_AND_RODATA := 1
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override RESET_TO_BL31 := 1
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PL011_GENERIC_UART := 1
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IPI_CRC_CHECK := 0
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GIC_ENABLE_V4_EXTN := 0
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GICV3_SUPPORT_GIC600 := 1
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override CTX_INCLUDE_AARCH32_REGS := 0
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ifdef MEM_BASE
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$(eval $(call add_define,MEM_BASE))
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ifndef MEM_SIZE
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$(error "ATF_BASE defined without ATF_SIZE")
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endif
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$(eval $(call add_define,MEM_SIZE))
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ifdef MEM_PROGBITS_SIZE
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$(eval $(call add_define,MEM_PROGBITS_SIZE))
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endif
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endif
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ifdef BL32_MEM_BASE
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$(eval $(call add_define,BL32_MEM_BASE))
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ifndef BL32_MEM_SIZE
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$(error "BL32_BASE defined without BL32_SIZE")
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endif
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$(eval $(call add_define,BL32_MEM_SIZE))
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endif
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ifdef IPI_CRC_CHECK
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$(eval $(call add_define,IPI_CRC_CHECK))
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endif
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USE_COHERENT_MEM := 0
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HW_ASSISTED_COHERENCY := 1
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CONSOLE ?= pl011
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ifeq (${CONSOLE}, $(filter ${CONSOLE},pl011 pl011_0 pl011_1 dcc))
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else
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$(error Please define CONSOLE)
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endif
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$(eval $(call add_define_val,CONSOLE,CONSOLE_ID_${CONSOLE}))
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ifdef XILINX_OF_BOARD_DTB_ADDR
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$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
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endif
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PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
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-Iplat/xilinx/common/include/ \
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-Iplat/xilinx/common/ipi_mailbox_service/ \
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-I${PLAT_PATH}/include/ \
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-Iplat/xilinx/versal/pm_service/
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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include lib/xlat_tables_v2/xlat_tables.mk
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include lib/libfdt/libfdt.mk
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PLAT_BL_COMMON_SOURCES := \
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drivers/arm/dcc/dcc_console.c \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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${GICV3_SOURCES} \
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drivers/arm/pl011/aarch64/pl011_console.S \
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plat/common/aarch64/crash_console_helpers.S \
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plat/arm/common/arm_common.c \
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plat/common/plat_gicv3.c \
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${PLAT_PATH}/aarch64/helpers.S \
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${PLAT_PATH}/aarch64/common.c \
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${PLAT_PATH}/plat_topology.c \
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${XLAT_TABLES_LIB_SRCS}
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BL31_SOURCES += drivers/arm/cci/cci.c \
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lib/cpus/aarch64/cortex_a78_ae.S \
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lib/cpus/aarch64/cortex_a78.S \
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plat/common/plat_psci_common.c \
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drivers/scmi-msg/base.c \
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drivers/scmi-msg/entry.c \
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drivers/scmi-msg/smt.c \
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drivers/scmi-msg/clock.c \
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drivers/scmi-msg/power_domain.c \
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drivers/scmi-msg/reset_domain.c \
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${PLAT_PATH}/scmi.c
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BL31_SOURCES += ${PLAT_PATH}/plat_psci.c
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BL31_SOURCES += plat/xilinx/common/plat_fdt.c \
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plat/xilinx/common/plat_startup.c \
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plat/xilinx/common/ipi.c \
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plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
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${PLAT_PATH}/soc_ipi.c \
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plat/xilinx/common/versal.c \
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${PLAT_PATH}/bl31_setup.c \
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common/fdt_fixup.c \
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common/fdt_wrappers.c \
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${LIBFDT_SRCS} \
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${PLAT_PATH}/sip_svc_setup.c \
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${PLAT_PATH}/gicv3.c
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ifeq (${ERRATA_ABI_SUPPORT}, 1)
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# enable the cpu macros for errata abi interface
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CORTEX_A78_AE_H_INC := 1
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$(eval $(call add_define, CORTEX_A78_AE_H_INC))
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endif
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