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This change creates the following directories under docs/ in order to provide a grouping for the content: - components - design - getting_started - perf - process In each of these directories an index.rst file is created and this serves as an index / landing page for each of the groups when the pages are compiled. Proper layout of the top-level table of contents relies on this directory/index structure. Without this patch it is possible to build the documents correctly with Sphinx but the output looks messy because there is no overall hierarchy. Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Security Center
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===============
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Security Disclosures
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--------------------
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We disclose all security vulnerabilities we find or are advised about that are
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relevant for ARM Trusted Firmware (TF). We encourage responsible disclosure of
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vulnerabilities and inform users as best we can about all possible issues.
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We disclose TF vulnerabilities as Security Advisories. These are listed at the
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bottom of this page and announced as issues in the `GitHub issue tracker`_ with
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the "security-advisory" tag. You can receive notification emails for these by
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watching that project.
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Found a Security Issue?
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-----------------------
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Although we try to keep TF secure, we can only do so with the help of the
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community of developers and security researchers.
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If you think you have found a security vulnerability, please *do not* report it
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in the `GitHub issue tracker`_. Instead send an email to
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trusted-firmware-security@arm.com
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Please include:
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* Trusted Firmware version (or commit) affected
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* A description of the concern or vulnerability
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* Details on how to replicate the vulnerability, including:
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- Configuration details
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- Proof of concept exploit code
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- Any additional software or tools required
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We recommend using `this PGP/GPG key`_ for encrypting the information. This key
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is also available at http://keyserver.pgp.com and LDAP port 389 of the same
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server. The fingerprint for this key is:
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::
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1309 2C19 22B4 8E87 F17B FE5C 3AB7 EFCB 45A0 DFD0
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If you would like replies to be encrypted, please provide your public key.
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Please give us the time to respond to you and fix the vulnerability before going
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public. We do our best to respond and fix any issues quickly. We also need to
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ensure providers of products that use TF have a chance to consider the
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implications of the vulnerability and its remedy.
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Afterwards, we encourage you to write-up your findings about the TF source code.
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Attribution
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-----------
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We will name and thank you in the ``change-log.rst`` distributed with the source
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code and in any published security advisory.
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Security Advisories
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-------------------
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+-----------+------------------------------------------------------------------+
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| ID | Title |
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+===========+==================================================================+
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| `TFV-1`_ | Malformed Firmware Update SMC can result in copy of unexpectedly |
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| | large data into secure memory |
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+-----------+------------------------------------------------------------------+
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| `TFV-2`_ | Enabled secure self-hosted invasive debug interface can allow |
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| | normal world to panic secure world |
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+-----------+------------------------------------------------------------------+
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| `TFV-3`_ | RO memory is always executable at AArch64 Secure EL1 |
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+-----------+------------------------------------------------------------------+
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| `TFV-4`_ | Malformed Firmware Update SMC can result in copy or |
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| | authentication of unexpected data in secure memory in AArch32 |
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| | state |
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+-----------+------------------------------------------------------------------+
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| `TFV-5`_ | Not initializing or saving/restoring PMCR_EL0 can leak secure |
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| | world timing information |
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+-----------+------------------------------------------------------------------+
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| `TFV-6`_ | Arm Trusted Firmware exposure to speculative processor |
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| | vulnerabilities using cache timing side-channels |
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+-----------+------------------------------------------------------------------+
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| `TFV-7`_ | Trusted Firmware-A exposure to cache speculation vulnerability |
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| | Variant 4 |
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+-----------+------------------------------------------------------------------+
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| `TFV-8`_ | Not saving x0 to x3 registers can leak information from one |
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| | Normal World SMC client to another |
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+-----------+------------------------------------------------------------------+
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.. _GitHub issue tracker: https://github.com/ARM-software/tf-issues/issues
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.. _this PGP/GPG key: security-reporting.asc
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.. _TFV-1: ./security_advisories/security-advisory-tfv-1.rst
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.. _TFV-2: ./security_advisories/security-advisory-tfv-2.rst
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.. _TFV-3: ./security_advisories/security-advisory-tfv-3.rst
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.. _TFV-4: ./security_advisories/security-advisory-tfv-4.rst
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.. _TFV-5: ./security_advisories/security-advisory-tfv-5.rst
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.. _TFV-6: ./security_advisories/security-advisory-tfv-6.rst
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.. _TFV-7: ./security_advisories/security-advisory-tfv-7.rst
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.. _TFV-8: ./security_advisories/security-advisory-tfv-8.rst
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