Varun Wadekar 3f4d81dfd2 fix(errata): workaround for Cortex A78 AE erratum 2395408 ... Cortex A78 AE erratum 2395408 is a Cat B erratum that applies to revisions <= r0p1. It is still open. This erratum states, "A translation table walk that matches an existing L1 prefetch with a read request outstanding on CHI might fold into the prefetch, which might lead to data corruption for a future instruction fetch" This erratum is avoided by setting CPUACTLR2_EL1[40] to 1 to disable folding of demand requests into older prefetches with L2 miss requests outstanding. SDEN is available at https://developer.arm.com/documentation/SDEN-1707912 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ic17968987ca3c67fa7f64211bcde6dfcb35ed5d6		2022-03-24 10:55:48 +00:00
..
aarch32	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
aarch64	fix(errata): workaround for Cortex A78 AE erratum 2395408	2022-03-24 10:55:48 +00:00
errata_report.h	Workaround for Cortex A78 erratum 1951500	2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2022_23960.h	fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57	2022-03-18 01:01:34 +02:00