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831b0e9824
And from crash_console_flush. We ignore the error information return by console_flush in _every_ place where we call it, and casting the return type to void does not work around the MISRA violation that this causes. Instead, we collect the error information from the driver (to avoid changing that API), and don't return it to the caller. Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
110 lines
2.6 KiB
ArmAsm
110 lines
2.6 KiB
ArmAsm
/*
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <assert_macros.S>
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#include <platform_def.h>
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.global sq_calc_core_pos
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.global plat_my_core_pos
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.global platform_mem_init
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.global plat_is_my_cpu_primary
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.global plat_secondary_cold_boot_setup
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.global plat_crash_console_init
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.global plat_crash_console_putc
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.global plat_crash_console_flush
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/*
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* unsigned int sq_calc_core_pos(u_register_t mpidr)
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* core_pos = (cluster_id * max_cpus_per_cluster) + core_id
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*/
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func sq_calc_core_pos
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and x1, x0, #MPIDR_CPU_MASK
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and x0, x0, #MPIDR_CLUSTER_MASK
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add x0, x1, x0, lsr #7
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ret
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endfunc sq_calc_core_pos
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func plat_my_core_pos
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mrs x0, mpidr_el1
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b sq_calc_core_pos
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endfunc plat_my_core_pos
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func platform_mem_init
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ret
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endfunc platform_mem_init
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/*
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* Secondary CPUs are placed in a holding pen, waiting for their mailbox
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* to be populated. Note that all CPUs share the same mailbox ; therefore,
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* populating it will release all CPUs from their holding pen. If
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* finer-grained control is needed then this should be handled in the
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* code that secondary CPUs jump to.
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*/
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func plat_secondary_cold_boot_setup
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ldr x0, sq_sec_entrypoint
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/* Wait until the mailbox gets populated */
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poll_mailbox:
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cbz x0, 1f
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br x0
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1:
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wfe
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b poll_mailbox
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endfunc plat_secondary_cold_boot_setup
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/*
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* Find out whether the current cpu is the primary
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* cpu (applicable only after a cold boot)
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*/
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func plat_is_my_cpu_primary
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mov x9, x30
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bl plat_my_core_pos
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ldr x1, =SQ_BOOT_CFG_ADDR
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ldr x1, [x1]
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ubfx x1, x1, #PLAT_SQ_PRIMARY_CPU_SHIFT, \
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#PLAT_SQ_PRIMARY_CPU_BIT_WIDTH
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cmp x0, x1
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cset w0, eq
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ret x9
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endfunc plat_is_my_cpu_primary
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/*
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* int plat_crash_console_init(void)
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* Function to initialize the crash console
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* without a C Runtime to print crash report.
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* Clobber list : x0, x1, x2
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*/
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func plat_crash_console_init
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mov_imm x0, PLAT_SQ_BOOT_UART_BASE
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mov_imm x1, PLAT_SQ_BOOT_UART_CLK_IN_HZ
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mov_imm x2, SQ_CONSOLE_BAUDRATE
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b console_pl011_core_init
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endfunc plat_crash_console_init
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/*
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* int plat_crash_console_putc(int c)
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* Function to print a character on the crash
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* console without a C Runtime.
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* Clobber list : x1, x2
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*/
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func plat_crash_console_putc
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mov_imm x1, PLAT_SQ_BOOT_UART_BASE
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b console_pl011_core_putc
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endfunc plat_crash_console_putc
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/*
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* void plat_crash_console_flush(int c)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* Out : void.
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* Clobber list : x0, x1
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*/
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func plat_crash_console_flush
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mov_imm x0, PLAT_SQ_BOOT_UART_BASE
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b console_pl011_core_flush
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endfunc plat_crash_console_flush
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