Andre Przywara 387b8801f9 refactor(cpufeat): use alternative encoding for "SB" barrier ... The "sb" barrier instruction is a rather new addition to the AArch64 instruction set, so it is not recognised by all toolchains. On top of that, the GNU assembler denies this instruction, unless a compatible processor is selected: asm_macros.S:223: Error: selected processor does not support `sb' Provide an alternative encoding of the "sb" instruction, by using a system register write, as this is the group where the barrier instructions borrow their encoding space from. This results in the exact same opcode to be generated, and any disassembler will decode this instruction as "sb". Change-Id: I5f44c8321e0cc04c784e02bd838e964602a96a8e Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2023-03-22 13:33:22 +00:00
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aarch32	refactor(cpufeat): enable SYS_REG_TRACE for FEAT_STATE_CHECKED	2023-03-22 13:33:22 +00:00
aarch64	refactor(cpufeat): use alternative encoding for "SB" barrier	2023-03-22 13:33:22 +00:00