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Make codebase consistent in its use of #include "" syntax for user includes and #include <> syntax for system includes. Fixes ARM-software/tf-issues#65 Change-Id: If2f7c4885173b1fd05ac2cde5f1c8a07000c7a33
252 lines
6.5 KiB
C
252 lines
6.5 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <arch_helpers.h>
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#include <console.h>
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#include <platform.h>
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#include <runtime_svc.h>
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#include <debug.h>
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#include <context_mgmt.h>
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#include "psci_private.h"
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/*******************************************************************************
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* PSCI frontend api for servicing SMCs. Described in the PSCI spec.
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******************************************************************************/
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int psci_cpu_on(unsigned long target_cpu,
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unsigned long entrypoint,
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unsigned long context_id)
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{
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int rc;
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unsigned int start_afflvl, end_afflvl;
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/* Determine if the cpu exists of not */
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rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
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if (rc != PSCI_E_SUCCESS) {
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goto exit;
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}
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/*
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* To turn this cpu on, specify which affinity
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* levels need to be turned on
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*/
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start_afflvl = MPIDR_AFFLVL0;
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end_afflvl = get_max_afflvl();
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rc = psci_afflvl_on(target_cpu,
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entrypoint,
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context_id,
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start_afflvl,
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end_afflvl);
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exit:
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return rc;
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}
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unsigned int psci_version(void)
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{
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return PSCI_MAJOR_VER | PSCI_MINOR_VER;
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}
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int psci_cpu_suspend(unsigned int power_state,
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unsigned long entrypoint,
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unsigned long context_id)
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{
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int rc;
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unsigned long mpidr;
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unsigned int target_afflvl, pstate_type;
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/* Check SBZ bits in power state are zero */
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if (psci_validate_power_state(power_state))
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return PSCI_E_INVALID_PARAMS;
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/* Sanity check the requested state */
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target_afflvl = psci_get_pstate_afflvl(power_state);
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if (target_afflvl > MPIDR_MAX_AFFLVL)
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return PSCI_E_INVALID_PARAMS;
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pstate_type = psci_get_pstate_type(power_state);
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if (pstate_type == PSTATE_TYPE_STANDBY) {
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if (psci_plat_pm_ops->affinst_standby)
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rc = psci_plat_pm_ops->affinst_standby(power_state);
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else
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return PSCI_E_INVALID_PARAMS;
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} else {
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mpidr = read_mpidr();
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rc = psci_afflvl_suspend(mpidr,
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entrypoint,
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context_id,
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power_state,
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MPIDR_AFFLVL0,
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target_afflvl);
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}
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assert(rc == PSCI_E_INVALID_PARAMS || rc == PSCI_E_SUCCESS);
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return rc;
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}
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int psci_cpu_off(void)
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{
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int rc;
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unsigned long mpidr;
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int target_afflvl = get_max_afflvl();
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mpidr = read_mpidr();
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/*
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* Traverse from the highest to the lowest affinity level. When the
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* lowest affinity level is hit, all the locks are acquired. State
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* management is done immediately followed by cpu, cluster ...
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* ..target_afflvl specific actions as this function unwinds back.
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*/
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rc = psci_afflvl_off(mpidr, MPIDR_AFFLVL0, target_afflvl);
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/*
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* The only error cpu_off can return is E_DENIED. So check if that's
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* indeed the case.
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*/
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assert (rc == PSCI_E_SUCCESS || rc == PSCI_E_DENIED);
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return rc;
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}
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int psci_affinity_info(unsigned long target_affinity,
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unsigned int lowest_affinity_level)
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{
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int rc = PSCI_E_INVALID_PARAMS;
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unsigned int aff_state;
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aff_map_node *node;
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if (lowest_affinity_level > get_max_afflvl())
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return rc;
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node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
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if (node && (node->state & PSCI_AFF_PRESENT)) {
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/*
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* TODO: For affinity levels higher than 0 i.e. cpu, the
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* state will always be either ON or OFF. Need to investigate
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* how critical is it to support ON_PENDING here.
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*/
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aff_state = psci_get_state(node);
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/* A suspended cpu is available & on for the OS */
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if (aff_state == PSCI_STATE_SUSPEND) {
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aff_state = PSCI_STATE_ON;
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}
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rc = aff_state;
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}
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return rc;
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}
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/* Unimplemented */
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int psci_migrate(unsigned int target_cpu)
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{
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return PSCI_E_NOT_SUPPORTED;
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}
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/* Unimplemented */
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unsigned int psci_migrate_info_type(void)
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{
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return PSCI_TOS_NOT_PRESENT_MP;
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}
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unsigned long psci_migrate_info_up_cpu(void)
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{
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/*
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* Return value of this currently unsupported call depends upon
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* what psci_migrate_info_type() returns.
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*/
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return PSCI_E_SUCCESS;
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}
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/*******************************************************************************
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* PSCI top level handler for servicing SMCs.
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******************************************************************************/
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uint64_t psci_smc_handler(uint32_t smc_fid,
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uint64_t x1,
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uint64_t x2,
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uint64_t x3,
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uint64_t x4,
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void *cookie,
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void *handle,
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uint64_t flags)
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{
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uint64_t rc;
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switch (smc_fid) {
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case PSCI_VERSION:
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rc = psci_version();
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break;
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case PSCI_CPU_OFF:
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rc = __psci_cpu_off();
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break;
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case PSCI_CPU_SUSPEND_AARCH64:
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case PSCI_CPU_SUSPEND_AARCH32:
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rc = __psci_cpu_suspend(x1, x2, x3);
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break;
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case PSCI_CPU_ON_AARCH64:
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case PSCI_CPU_ON_AARCH32:
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rc = psci_cpu_on(x1, x2, x3);
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break;
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case PSCI_AFFINITY_INFO_AARCH32:
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case PSCI_AFFINITY_INFO_AARCH64:
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rc = psci_affinity_info(x1, x2);
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break;
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case PSCI_MIG_AARCH32:
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case PSCI_MIG_AARCH64:
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rc = psci_migrate(x1);
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break;
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case PSCI_MIG_INFO_TYPE:
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rc = psci_migrate_info_type();
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break;
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case PSCI_MIG_INFO_UP_CPU_AARCH32:
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case PSCI_MIG_INFO_UP_CPU_AARCH64:
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rc = psci_migrate_info_up_cpu();
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break;
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default:
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rc = SMC_UNK;
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WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
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}
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SMC_RET1(handle, rc);
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}
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