arm-trusted-firmware/plat/layerscape/common/ls_timer.c
Jiafei Pan 33d4af47b0 layerscape: Initial TF-A support for LS1043ardb
This patch introduce TF-A support for NXP's ls1043a platform.
more details information of ls1043a chip and ls1043ardb board
can be found at docs/plat/ls1043a.rst.

Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1
loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot
bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel.

Now TF-A on ls1043ardb platform has the following features in this patch:
	* Support boot from Nor flash.
	* TF-A can boot bl33 which runs in el2 of non-secure world.
	* TF-A boot OPTee OS.
	* Support PSCI

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
2018-04-10 01:24:40 +00:00

47 lines
1,021 B
C

/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <mmio.h>
#include <delay_timer.h>
#include <arch_helpers.h>
#define TIMER_BASE_ADDR 0x02B00000
uint64_t ls_get_timer(uint64_t start)
{
return read_cntpct_el0() * 1000 / read_cntfrq_el0() - start;
}
static uint32_t ls_timeus_get_value(void)
{
/*
* Generic delay timer implementation expects the timer to be a down
* counter. We apply bitwise NOT operator to the tick values returned
* by read_cntpct_el0() to simulate the down counter. The value is
* clipped from 64 to 32 bits.
*/
return (uint32_t)(~read_cntpct_el0());
}
static const timer_ops_t ls_timer_ops = {
.get_timer_value = ls_timeus_get_value,
.clk_mult = 1,
.clk_div = 25,
};
/*
* Initialise the nxp layerscape on-chip free rolling us counter as the delay
* timer.
*/
void ls_delay_timer_init(void)
{
uintptr_t cntcr = TIMER_BASE_ADDR;
mmio_write_32(cntcr, 0x1);
timer_init(&ls_timer_ops);
}