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34971f816a
This patch is used to enable UART & WDT support for Agilex5 SoC FPGA. 1. Added watchdog support. 2. Updated product name -> Agilex5 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I9346cfde6e033026e4c1e612250e9521bc6b0d47
43 lines
946 B
C
43 lines
946 B
C
/*
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* Copyright (c) 2019-2022, Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CAD_WATCHDOG_H
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#define CAD_WATCHDOG_H
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#if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5
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#define WDT_BASE (0x10D00200)
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#else
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#define WDT_BASE (0xFFD00200)
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#endif
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#define WDT_REG_SIZE_OFFSET (0x4)
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#define WDT_MIN_CYCLES (65536)
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#define WDT_PERIOD (20)
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#define WDT_CR (WDT_BASE + 0x0)
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#define WDT_TORR (WDT_BASE + 0x4)
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#define WDT_CRR (WDT_BASE + 0xC)
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#define WDT_CCVR (WDT_BASE + 0x8)
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#define WDT_STAT (WDT_BASE + 0x10)
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#define WDT_EOI (WDT_BASE + 0x14)
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#define WDT_COMP_PARAM_1 (WDT_BASE + 0xF4)
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#define WDT_COMP_VERSION (WDT_BASE + 0xF8)
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#define WDT_COMP_TYPE (WDT_BASE + 0XFC)
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#define WDT_CR_RMOD (0x0)
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#define WDT_CR_EN (0x1)
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#define WDT_SW_RST (0x76)
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void watchdog_init(int watchdog_clk);
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void watchdog_info(void);
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void watchdog_status(void);
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void watchdog_sw_rst(void);
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#endif
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