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lauwal01 335b3c79c7 Workaround for Neoverse N1 erratum 1257314 
Neoverse N1 erratum 1257314 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR3_EL1 system register, which prevents parallel
execution of divide and square root instructions.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html

Change-Id: I54f0f40ff9043efee40d51e796b92ed85b394cbb
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2019-07-02 09:16:32 -05:00
..
auth-framework.rst doc: Use proper note and warning annotations 2019-05-22 11:28:17 +01:00
cpu-specific-build-macros.rst Workaround for Neoverse N1 erratum 1257314 2019-07-02 09:16:32 -05:00
firmware-design.rst Further fixes to documentation links 2019-05-30 10:20:07 +01:00
index.rst doc: Move documents into subdirectories 2019-05-21 15:05:56 +01:00
interrupt-framework-design.rst doc: Use proper note and warning annotations 2019-05-22 11:28:17 +01:00
psci-pd-tree.rst doc: Set correct syntax highlighting style 2019-05-22 11:28:17 +01:00
reset-design.rst doc: Use proper note and warning annotations 2019-05-22 11:28:17 +01:00
trusted-board-boot.rst Further fixes to documentation links 2019-05-30 10:20:07 +01:00