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79629b1a79
Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY and its firmware, as well as the DDR controller. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I93de2db1b9378d5654e76b3bf6f3407d80bc4ca5
37 lines
909 B
C
37 lines
909 B
C
/*
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* Copyright (C) 2021-2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef DDRPHY_PHYINIT_H
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#define DDRPHY_PHYINIT_H
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#include <stdbool.h>
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#include <ddrphy_phyinit_usercustom.h>
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enum message_block_field {
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MB_FIELD_PSTATE,
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MB_FIELD_PLLBYPASSEN,
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MB_FIELD_DRAMFREQ,
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MB_FIELD_DFIFREQRATIO,
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MB_FIELD_BPZNRESVAL,
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MB_FIELD_PHYODTIMPEDANCE,
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MB_FIELD_PHYDRVIMPEDANCE,
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MB_FIELD_DRAMTYPE,
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MB_FIELD_DISABLEDDBYTE,
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MB_FIELD_ENABLEDDQS,
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MB_FIELD_PHYCFG,
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MB_FIELD_X16PRESENT,
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MB_FIELD_ENABLEDDQSCHA,
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MB_FIELD_CSPRESENTCHA,
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MB_FIELD_ENABLEDDQSCHB,
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MB_FIELD_CSPRESENTCHB,
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};
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/* Function definitions */
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int ddrphy_phyinit_softsetmb(struct pmu_smb_ddr_1d *mb_ddr_1d, enum message_block_field field,
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uint32_t value);
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void ddrphy_phyinit_initstruct(struct stm32mp_ddr_config *config, struct pmu_smb_ddr_1d *mb_ddr_1d);
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#endif /* DDRPHY_PHYINIT_H */
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