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arm-trusted-firmware/include/bl31
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Louis Mayencourt f1be00da0b Use correct type when reading SCR register 
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in
AArch32. Use u_register_t instead of unsigned int to reflect this.

Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2020-01-28 11:10:48 +00:00
..
bl31.h BL31: Enable pointer authentication support 2019-02-27 11:58:10 +00:00
ea_handle.h Standardise header guards across codebase 2018-11-08 10:20:19 +00:00
ehf.h Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ 2019-08-01 13:14:12 -07:00
interrupt_mgmt.h Use correct type when reading SCR register 2020-01-28 11:10:48 +00:00