Manish Pandey 2f41c9a7be feat(cm): support for asymmetric feature among cores ... TF-A assumes that all the cores in a platform has architecture feature parity, this is evident by the fact that primary sets up the Non-secure context of secondary cores. With changing landscape of platforms (e.g. big/little/mid cores), we are seeing more and more platforms which has feature asymmetry among cores. There is also a scenario where certain CPU erratum only applies to one type of cores and requires a feature to be disabled even it supports the feature. To handle these scenarios, introduce a hook in warmboot path which would be called on the running CPU to override any feature disparity in the NS context stashed up by primary. Note that, re-checking of feature for Secure/Realm context is not required as the context is created on running core itself. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I5a01dbda528fa8481a00fdd098b58a7463ed0e22		2024-08-17 09:35:53 +01:00
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aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	feat(cm): support for asymmetric feature among cores	2024-08-17 09:35:53 +01:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00