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DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle. Add MCUSYS or bus related DCM drivers. Enable MCUSYS or bus related DCM by default. Signed-off-by: Guangjie Song <guangjie.song@mediatek.com> Change-Id: I40fc21f5808962ca46870a2f3b9963dc8088f877
117 lines
2.1 KiB
C
117 lines
2.1 KiB
C
/*
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* Copyright (c) 2025, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <lib/mtk_init/mtk_init.h>
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#include <mtk_dcm_utils.h>
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static void dcm_infra(bool on)
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{
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dcm_bcrm_apinfra_io_ctrl_ao_infra_bus_dcm(on);
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dcm_bcrm_apinfra_io_noc_ao_infra_bus_dcm(on);
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dcm_bcrm_apinfra_mem_ctrl_ao_infra_bus_dcm(on);
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dcm_bcrm_apinfra_mem_intf_noc_ao_infra_bus_dcm(on);
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}
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static void dcm_mcusys(bool on)
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{
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dcm_mcusys_par_wrap_mcu_misc_dcm(on);
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}
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static void dcm_mcusys_acp(bool on)
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{
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dcm_mcusys_par_wrap_mcu_acp_dcm(on);
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}
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static void dcm_mcusys_adb(bool on)
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{
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dcm_mcusys_par_wrap_mcu_adb_dcm(on);
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}
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static void dcm_mcusys_apb(bool on)
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{
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dcm_mcusys_par_wrap_mcu_apb_dcm(on);
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}
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static void dcm_mcusys_bus(bool on)
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{
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dcm_mcusys_par_wrap_mcu_bus_qdcm(on);
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}
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static void dcm_mcusys_cbip(bool on)
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{
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dcm_mcusys_par_wrap_mcu_cbip_dcm(on);
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}
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static void dcm_mcusys_chi_mon(bool on)
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{
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dcm_mcusys_par_wrap_mcu_chi_mon_dcm(on);
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}
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static void dcm_mcusys_core(bool on)
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{
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dcm_mcusys_par_wrap_mcu_core_qdcm(on);
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}
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static void dcm_mcusys_dsu_acp(bool on)
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{
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dcm_mcusys_par_wrap_mcu_dsu_acp_dcm(on);
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}
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static void dcm_mcusys_ebg(bool on)
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{
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dcm_mcusys_par_wrap_mcu_ebg_dcm(on);
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}
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static void dcm_mcusys_gic_spi(bool on)
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{
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dcm_mcusys_par_wrap_mcu_gic_spi_dcm(on);
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}
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static void dcm_mcusys_io(bool on)
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{
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dcm_mcusys_par_wrap_mcu_io_dcm(on);
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}
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static void dcm_mcusys_l3c(bool on)
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{
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dcm_mcusys_par_wrap_mcu_l3c_dcm(on);
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}
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static void dcm_mcusys_stall(bool on)
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{
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dcm_mcusys_par_wrap_mcu_stalldcm(on);
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}
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static void dcm_vlp(bool on)
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{
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dcm_vlp_ao_bcrm_vlp_bus_dcm(on);
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}
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int mtk_dcm_init(void)
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{
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dcm_infra(true);
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dcm_mcusys(true);
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dcm_mcusys_acp(true);
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dcm_mcusys_adb(true);
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dcm_mcusys_apb(true);
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dcm_mcusys_bus(true);
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dcm_mcusys_cbip(true);
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dcm_mcusys_chi_mon(true);
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dcm_mcusys_core(true);
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dcm_mcusys_dsu_acp(true);
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dcm_mcusys_ebg(true);
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dcm_mcusys_gic_spi(true);
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dcm_mcusys_io(true);
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dcm_mcusys_l3c(true);
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dcm_mcusys_stall(true);
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dcm_vlp(true);
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return 0;
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}
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MTK_PLAT_SETUP_0_INIT(mtk_dcm_init);
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