Jayanth Dodderi Chidanand 2b0bc4e028 feat(cpufeat): enable FEAT_SVE for FEAT_STATE_CHECKED ... Add support for runtime detection (ENABLE_SVE_FOR_NS=2), by splitting sve_supported() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we do SVE specific setup. Change the FVP platform default to the now supported dynamic option (=2), so the right decision can be made by the code at runtime. Change-Id: I1caaba2216e8e2a651452254944a003607503216 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>		2023-03-28 17:19:13 +02:00
..
aarch64	fix(smccc): check smc_fid [23:17] bits	2023-03-20 10:12:38 +00:00
bl31.ld.S	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
bl31.mk	feat(cpufeat): enable FEAT_SVE for FEAT_STATE_CHECKED	2023-03-28 17:19:13 +02:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	refactor(context-mgmt): move FEAT_HCX save/restore into C	2023-01-11 16:02:58 +00:00
bl31_traps.c	feat(fvp): emulate trapped RNDR	2022-12-21 12:59:36 +00:00
ehf.c	fix(bl31): allow use of EHF with S-EL2 SPMC	2022-08-30 08:29:25 -07:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00