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283e5595af
The size of a GICv3 redistributor region depends on the number of cores in the system. For the ARM FPGA port, we detect the topology at runtime, and adjust the CPU DT nodes accordingly. Now the size of the GICR region must also be adjusted, or Linux will fail to initialise the GICv3. Use the newly introduced function to overwrite the GICR size entry in the GICv3 reg property. We count the number of existing cores by iterating over the GICR frames until we find the LAST bit set in TYPER. Change-Id: Ib69565600859de9b1b15ceb8495172cd26d16fce Signed-off-by: Andre Przywara <andre.przywara@arm.com>
31 lines
688 B
C
31 lines
688 B
C
/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FPGA_PRIVATE_H
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#define FPGA_PRIVATE_H
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#include "../fpga_def.h"
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#include <platform_def.h>
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#define C_RUNTIME_READY_KEY (0xaa55aa55)
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#define VALID_MPID (1U)
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#define FPGA_MAX_DTB_SIZE 0x10000
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#ifndef __ASSEMBLER__
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extern unsigned char fpga_valid_mpids[PLATFORM_CORE_COUNT];
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void fpga_console_init(void);
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void plat_fpga_gic_init(void);
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void fpga_pwr_gic_on_finish(void);
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void fpga_pwr_gic_off(void);
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unsigned int plat_fpga_calc_core_pos(uint32_t mpid);
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unsigned int fpga_get_nr_gic_cores(void);
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#endif /* __ASSEMBLER__ */
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#endif /* FPGA_PRIVATE_H */
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