arm-trusted-firmware/lib/psci
Jayanth Dodderi Chidanand ed6d4a3b48 refactor(cpus): convert the Cortex-A510 to use the errata framework
This involves replacing:
 * the reset_func with the standard cpu_reset_func_{start,end} to apply
   errata automatically
 * the <cpu>_errata_report with the errata_report_shim to report errata
   automatically
...and for each erratum:
 * the prologue with the workaround_<type>_start to do the checks and
   framework registration automatically
 * the epilogue with the workaround_<type>_end
 * the checker function with the check_erratum_<type> to make it more
   descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Note: cortex_a510.S is applicable and being used only by arm_fpga platform.

However, to test the ported changes, below steps were carried out on the
fvp and the obtained results has been verified.

Testing was conducted by:
 * Building for release with all errata flags enabled and running script
   in change 19136 to compare output of objdump for each errata.

 * Testing via script was not complete, as it directed to verify the
   check and the workaround functions of few erratas manually.

 * Manual comparison of disassembly of converted functions with non-
   converted functions

   aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf
     vs
   aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

 * Manual comparison of disassembly of both both files(bl31.elf)
   ensured, the ported changes were identical and hence verified.

 * Build for release with all errata flags enabled and run default
   tftf tests.

   CROSS_COMPILE=aarch64-none-elf- \
   make PLAT=fvp \
   ARCH=aarch64 \
   DEBUG=0 \
   HW_ASSISTED_COHERENCY=1 \
   USE_COHERENT_MEM=0 \
   CTX_INCLUDE_AARCH32_REGS=0 \
   ERRATA_A510_1922240=1 \
   ERRATA_A510_2288014=1 \
   ERRATA_A510_2042739=1 \
   ERRATA_A510_2041909=1 \
   ERRATA_A510_2250311=1 \
   ERRATA_A510_2218950=1 \
   ERRATA_A510_2172148=1 \
   ERRATA_A510_2347730=1 \
   ERRATA_A510_2371937=1 \
   ERRATA_A510_2666669=1 \
   ERRATA_A510_2684597=1 \
   ERRATA_DSU_2313941=1 \
   BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \
   fip all -j12

 * Build for debug with all errata enabled and step through ArmDS
   at reset to ensure that if Errata are applicable then the
   workaround functions are entered precisely.

Change-Id: Icf7aa25c0b3b30f5e2ad6db83953f7f4f0b201d9
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
2023-07-27 09:35:12 +01:00
..
aarch32 fix(psci): tighten psci_power_down_wfi behaviour 2023-01-23 17:25:40 +00:00
aarch64 refactor(cpus): convert the Cortex-A510 to use the errata framework 2023-07-27 09:35:12 +01:00
psci_common.c refactor(psci): extract cm_prepare_el3_exit_ns() to a common location 2023-07-24 11:04:44 +01:00
psci_lib.mk build(psci): move runtime_errata.S to PSCI 2023-05-03 15:36:08 +02:00
psci_main.c fix(psci): remove unreachable switch/case blocks 2023-04-04 12:39:36 +02:00
psci_mem_protect.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
psci_off.c fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t 2023-05-31 23:54:19 -07:00
psci_on.c refactor(psci): extract cm_prepare_el3_exit_ns() to a common location 2023-07-24 11:04:44 +01:00
psci_private.h fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t 2023-05-31 23:54:19 -07:00
psci_setup.c refactor(cpus): rename errata_report.h to errata.h 2023-05-30 09:31:15 +01:00
psci_stat.c Unify type of "cpu_idx" across PSCI module. 2020-01-10 17:11:51 +00:00
psci_suspend.c refactor(psci): extract cm_prepare_el3_exit_ns() to a common location 2023-07-24 11:04:44 +01:00
psci_system_off.c Don't return error information from console_flush 2020-10-09 10:21:50 -05:00