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291bb2f4d0
For E1, this involves replacing:
- The reset_func with the standard cpu_reset_func_{start,end}
to apply errata automatically
- The <cpu>_errata_report with the errata_report_shim to
report errata automatically
And for the E1 DSU erratum, creating symbolic names to the already
existing errata workaround functions to get them registered under
the Errata Framework.
Testing was conducted by:
- Manual comparison of disassembly of converted functions with non-
converted functions:
aarch64-none-elf-objdump -D
<trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D
<trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf
- Build for debug with all errata enabled and step through ArmDS
to ensure all functions are entered and the path remains the same
as before conversion to the new framework.
Change-Id: I0a059574948badbd108333344286c76aeb142e71
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
59 lines
1.7 KiB
ArmAsm
59 lines
1.7 KiB
ArmAsm
/*
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* Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <neoverse_e1.h>
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#include <cpu_macros.S>
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#include <plat_macros.S>
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/* Hardware handled coherency */
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#if HW_ASSISTED_COHERENCY == 0
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#error "Neoverse E1 must be compiled with HW_ASSISTED_COHERENCY enabled"
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#endif
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/* 64-bit only core */
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#if CTX_INCLUDE_AARCH32_REGS == 1
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#error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
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#endif
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/*
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* ERRATA_DSU_936184:
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* The errata is defined in dsu_helpers.S and applies to neoverse_e1.
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* Henceforth creating symbolic names to the already existing errata
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* workaround functions to get them registered under the Errata Framework.
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*/
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.equ check_erratum_neoverse_e1_936184, check_errata_dsu_936184
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.equ erratum_neoverse_e1_936184_wa, errata_dsu_936184_wa
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add_erratum_entry neoverse_e1, ERRATUM(936184), ERRATA_DSU_936184, APPLY_AT_RESET
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cpu_reset_func_start neoverse_e1
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cpu_reset_func_end neoverse_e1
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func neoverse_e1_cpu_pwr_dwn
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mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1
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orr x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
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msr NEOVERSE_E1_CPUPWRCTLR_EL1, x0
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isb
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ret
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endfunc neoverse_e1_cpu_pwr_dwn
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errata_report_shim neoverse_e1
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.section .rodata.neoverse_e1_regs, "aS"
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neoverse_e1_regs: /* The ascii list of register names to be reported */
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.asciz "cpuectlr_el1", ""
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func neoverse_e1_cpu_reg_dump
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adr x6, neoverse_e1_regs
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mrs x8, NEOVERSE_E1_ECTLR_EL1
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ret
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endfunc neoverse_e1_cpu_reg_dump
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declare_cpu_ops neoverse_e1, NEOVERSE_E1_MIDR, \
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neoverse_e1_reset_func, \
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neoverse_e1_cpu_pwr_dwn
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