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https://github.com/ARM-software/arm-trusted-firmware.git
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742ca2307f
This change makes AMU auxiliary counters configurable on a per-core
basis, controlled by `ENABLE_AMU_AUXILIARY_COUNTERS`.
Auxiliary counters can be described via the `HW_CONFIG` device tree if
the `ENABLE_AMU_FCONF` build option is enabled, or the platform must
otherwise implement the `plat_amu_topology` function.
A new phandle property for `cpu` nodes (`amu`) has been introduced to
the `HW_CONFIG` specification to allow CPUs to describe the view of
their own AMU:
```
cpu0: cpu@0 {
...
amu = <&cpu0_amu>;
};
```
Multiple cores may share an `amu` handle if they implement the
same set of auxiliary counters.
AMU counters are described for one or more AMUs through the use of a new
`amus` node:
```
amus {
cpu0_amu: amu-0 {
#address-cells = <1>;
#size-cells = <0>;
counter@0 {
reg = <0>;
enable-at-el3;
};
counter@n {
reg = <n>;
...
};
};
};
```
This structure describes the **auxiliary** (group 1) AMU counters.
Architected counters have architecturally-defined behaviour, and as
such do not require DTB entries.
These `counter` nodes support two properties:
- The `reg` property represents the counter register index.
- The presence of the `enable-at-el3` property determines whether
the firmware should enable the counter prior to exiting EL3.
Change-Id: Ie43aee010518c5725a3b338a4899b0857caf4c28
Signed-off-by: Chris Kay <chris.kay@arm.com>
142 lines
3 KiB
C
142 lines
3 KiB
C
/*
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* Copyright (c) 2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <common/debug.h>
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#include <common/fdt_wrappers.h>
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#include <lib/fconf/fconf.h>
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#include <lib/fconf/fconf_amu_getter.h>
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#include <libfdt.h>
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#include <plat/common/platform.h>
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struct fconf_amu_config fconf_amu_config;
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static struct amu_topology fconf_amu_topology_;
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/*
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* Populate the core-specific AMU structure with information retrieved from a
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* device tree.
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*
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* Returns `0` on success, or a negative integer representing an error code.
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*/
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static int fconf_populate_amu_cpu_amu(const void *fdt, int parent,
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struct amu_core *amu)
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{
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int ret = 0;
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int node = 0;
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fdt_for_each_subnode(node, fdt, parent) {
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const char *name;
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const char *value;
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int len;
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uintptr_t idx = 0U;
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name = fdt_get_name(fdt, node, &len);
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if (strncmp(name, "counter@", 8) != 0) {
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continue;
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}
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ret = fdt_get_reg_props_by_index(fdt, node, 0, &idx, NULL);
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if (ret < 0) {
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break;
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}
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value = fdt_getprop(fdt, node, "enable-at-el3", &len);
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if ((value == NULL) && (len != -FDT_ERR_NOTFOUND)) {
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break;
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}
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if (len != -FDT_ERR_NOTFOUND) {
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amu->enable |= (1 << idx);
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}
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}
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if ((node < 0) && (node != -FDT_ERR_NOTFOUND)) {
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return node;
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}
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return ret;
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}
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/*
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* Within a `cpu` node, attempt to dereference the `amu` property, and populate
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* the AMU information for the core.
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*
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* Returns `0` on success, or a negative integer representing an error code.
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*/
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static int fconf_populate_amu_cpu(const void *fdt, int node, uintptr_t mpidr)
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{
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int ret;
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int idx;
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uint32_t amu_phandle;
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struct amu_core *amu;
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ret = fdt_read_uint32(fdt, node, "amu", &amu_phandle);
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if (ret < 0) {
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if (ret == -FDT_ERR_NOTFOUND) {
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ret = 0;
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}
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return ret;
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}
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node = fdt_node_offset_by_phandle(fdt, amu_phandle);
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if (node < 0) {
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return node;
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}
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idx = plat_core_pos_by_mpidr(mpidr);
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if (idx < 0) {
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return -FDT_ERR_BADVALUE;
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}
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amu = &fconf_amu_topology_.cores[idx];
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return fconf_populate_amu_cpu_amu(fdt, node, amu);
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}
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/*
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* Populates the global `amu_topology` structure based on what's described by
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* the hardware configuration device tree blob.
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*
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* The device tree is expected to provide an `amu` property for each `cpu` node,
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* like so:
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*
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* cpu@0 {
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* amu = <&cpu0_amu>;
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* };
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*
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* amus {
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* cpu0_amu: amu-0 {
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* counters {
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* #address-cells = <2>;
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* #size-cells = <0>;
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*
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* counter@x,y {
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* reg = <x y>; // Group x, counter y
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* };
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* };
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* };
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* };
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*/
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static int fconf_populate_amu(uintptr_t config)
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{
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int ret = fdtw_for_each_cpu(
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(const void *)config, fconf_populate_amu_cpu);
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if (ret == 0) {
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fconf_amu_config.topology = &fconf_amu_topology_;
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} else {
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ERROR("FCONF: failed to parse AMU information: %d\n", ret);
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}
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return ret;
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}
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FCONF_REGISTER_POPULATOR(HW_CONFIG, amu, fconf_populate_amu);
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