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https://github.com/ARM-software/arm-trusted-firmware.git
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eaaf517cd1
Add code in SPMD to forward calls to FFA_PARTITION_INFO_GET_REGS. This is a new ABI that allows getting partition information without the need for rx/tx buffer, that helps in situations where having an rx/tx buffer mapped and available is difficult (ex. uefi runtime services). Currently, the spmc at el3 does not support this new ABI. The new ABI uses registers x8-x17 to return partition information so changes are made to ensure those registers are passed through to the SPMC and restored on the return path. Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: I1fe5956763e054e4f8d62292fc1247e7120bb5a4
162 lines
4.9 KiB
C
162 lines
4.9 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SMCCC_HELPERS_H
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#define SMCCC_HELPERS_H
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#include <lib/smccc.h>
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/* Definitions to help the assembler access the SMC/ERET args structure */
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#define SMC_ARGS_SIZE 0x40
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#define SMC_ARG0 0x0
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#define SMC_ARG1 0x8
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#define SMC_ARG2 0x10
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#define SMC_ARG3 0x18
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#define SMC_ARG4 0x20
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#define SMC_ARG5 0x28
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#define SMC_ARG6 0x30
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#define SMC_ARG7 0x38
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#define SMC_ARGS_END 0x40
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#ifndef __ASSEMBLER__
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#include <stdbool.h>
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#include <context.h>
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#include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */
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/* Convenience macros to return from SMC handler */
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#define SMC_RET0(_h) { \
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return (uint64_t) (_h); \
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}
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#define SMC_RET1(_h, _x0) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X0), (_x0)); \
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SMC_RET0(_h); \
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}
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#define SMC_RET2(_h, _x0, _x1) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X1), (_x1)); \
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SMC_RET1(_h, (_x0)); \
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}
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#define SMC_RET3(_h, _x0, _x1, _x2) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X2), (_x2)); \
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SMC_RET2(_h, (_x0), (_x1)); \
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}
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#define SMC_RET4(_h, _x0, _x1, _x2, _x3) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X3), (_x3)); \
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SMC_RET3(_h, (_x0), (_x1), (_x2)); \
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}
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#define SMC_RET5(_h, _x0, _x1, _x2, _x3, _x4) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X4), (_x4)); \
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SMC_RET4(_h, (_x0), (_x1), (_x2), (_x3)); \
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}
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#define SMC_RET6(_h, _x0, _x1, _x2, _x3, _x4, _x5) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X5), (_x5)); \
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SMC_RET5(_h, (_x0), (_x1), (_x2), (_x3), (_x4)); \
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}
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#define SMC_RET7(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X6), (_x6)); \
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SMC_RET6(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5)); \
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}
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#define SMC_RET8(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6, _x7) { \
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write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X7), (_x7)); \
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SMC_RET7(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5), (_x6)); \
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}
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/*
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* Convenience macros to access general purpose registers using handle provided
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* to SMC handler. These take the offset values defined in context.h
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*/
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#define SMC_GET_GP(_h, _g) \
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read_ctx_reg((get_gpregs_ctx(_h)), (_g))
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#define SMC_SET_GP(_h, _g, _v) \
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write_ctx_reg((get_gpregs_ctx(_h)), (_g), (_v))
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/* Useful for SMCCCv1.2 */
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#define SMC_RET18(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6, _x7, _x8, _x9, \
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_x10, _x11, _x12, _x13, _x14, _x15, _x16, _x17) { \
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SMC_SET_GP(_h, CTX_GPREG_X8, _x8); \
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SMC_SET_GP(_h, CTX_GPREG_X9, _x9); \
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SMC_SET_GP(_h, CTX_GPREG_X10, _x10); \
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SMC_SET_GP(_h, CTX_GPREG_X11, _x11); \
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SMC_SET_GP(_h, CTX_GPREG_X12, _x12); \
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SMC_SET_GP(_h, CTX_GPREG_X13, _x13); \
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SMC_SET_GP(_h, CTX_GPREG_X14, _x14); \
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SMC_SET_GP(_h, CTX_GPREG_X15, _x15); \
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SMC_SET_GP(_h, CTX_GPREG_X16, _x16); \
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SMC_SET_GP(_h, CTX_GPREG_X17, _x17); \
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SMC_RET8(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5), (_x6), \
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(_x7)); \
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}
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/*
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* Convenience macros to access EL3 context registers using handle provided to
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* SMC handler. These take the offset values defined in context.h
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*/
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#define SMC_GET_EL3(_h, _e) \
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read_ctx_reg((get_el3state_ctx(_h)), (_e))
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#define SMC_SET_EL3(_h, _e, _v) \
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write_ctx_reg((get_el3state_ctx(_h)), (_e), (_v))
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/*
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* Helper macro to retrieve the SMC parameters from cpu_context_t.
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*/
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#define get_smc_params_from_ctx(_hdl, _x1, _x2, _x3, _x4) \
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do { \
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const gp_regs_t *regs = get_gpregs_ctx(_hdl); \
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_x1 = read_ctx_reg(regs, CTX_GPREG_X1); \
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_x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
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_x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
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_x4 = read_ctx_reg(regs, CTX_GPREG_X4); \
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} while (false)
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typedef struct {
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uint64_t _regs[SMC_ARGS_END >> 3];
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} __aligned(CACHE_WRITEBACK_GRANULE) smc_args_t;
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/*
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* Ensure that the assembler's view of the size of the tsp_args is the
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* same as the compilers.
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*/
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CASSERT(sizeof(smc_args_t) == SMC_ARGS_SIZE, assert_sp_args_size_mismatch);
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static inline smc_args_t smc_helper(uint32_t func, uint64_t arg0,
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uint64_t arg1, uint64_t arg2,
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uint64_t arg3, uint64_t arg4,
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uint64_t arg5, uint64_t arg6)
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{
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smc_args_t ret_args = {0};
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register uint64_t r0 __asm__("x0") = func;
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register uint64_t r1 __asm__("x1") = arg0;
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register uint64_t r2 __asm__("x2") = arg1;
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register uint64_t r3 __asm__("x3") = arg2;
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register uint64_t r4 __asm__("x4") = arg3;
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register uint64_t r5 __asm__("x5") = arg4;
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register uint64_t r6 __asm__("x6") = arg5;
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register uint64_t r7 __asm__("x7") = arg6;
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/* Output registers, also used as inputs ('+' constraint). */
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__asm__ volatile("smc #0"
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: "+r"(r0), "+r"(r1), "+r"(r2), "+r"(r3), "+r"(r4),
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"+r"(r5), "+r"(r6), "+r"(r7));
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ret_args._regs[0] = r0;
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ret_args._regs[1] = r1;
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ret_args._regs[2] = r2;
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ret_args._regs[3] = r3;
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ret_args._regs[4] = r4;
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ret_args._regs[5] = r5;
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ret_args._regs[6] = r6;
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ret_args._regs[7] = r7;
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return ret_args;
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}
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#endif /*__ASSEMBLER__*/
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#endif /* SMCCC_HELPERS_H */
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