Sona Mathew 2454316c2a fix(cpus): workaround for Cortex-X3 erratum 2070301 ... Cortex-X3 erratum 2070301 is a Cat B erratum that applies to all revisions <= r1p2 and is still open. The workaround is to write the value 4'b1001 to the PF_MODE bits in the IMP_CPUECTLR2_EL1 register. This places the data prefetcher in the most conservative mode instead of disabling it. SDEN documentation: https://developer.arm.com/documentation/2055130/latest Change-Id: I337c4c7bb9221715aaf973a55d0154e1c7555768 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>		2023-10-04 13:45:16 -05:00
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aarch32	refactor(cpus): add Cortex-A57 errata framework information	2023-08-24 14:27:42 -05:00
aarch64	fix(cpus): workaround for Cortex-X3 erratum 2070301	2023-10-04 13:45:16 -05:00
cpu-ops.mk	fix(cpus): workaround for Cortex-X3 erratum 2070301	2023-10-04 13:45:16 -05:00
errata_report.c	fix(cpus): reduce generic_errata_report()'s size	2023-06-15 10:14:59 +01:00