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![]() The GIC driver data is initialized by the primary CPU with caches enabled. When the secondary CPU boots up, it initializes the GICC/GICR interface with the caches disabled and there is a chance that the driver data is not yet written back to the memory. This patch fixes this problem by flushing the driver data after they have been initialized. Change-Id: Ie9477029683846209593ff005d2bac559bb8f5e6 Signed-off-by: Soby Mathew <soby.mathew@arm.com> |
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common | ||
v2 | ||
v3 | ||
arm_gic.c | ||
gic_v2.c | ||
gic_v3.c |