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https://github.com/ARM-software/arm-trusted-firmware.git
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29d1e29d7c
Support FDT for Agilex5 platform 1. Created wrapper file socfpga_dt.c 2. Added in Agilex5 dts file 3. Implemented fdt_check_header 4. Implemented gic configuration 5. Implemented dram configuration Remove init of FDT as Agilex5 has no plan to roll out FDT at the moment. Change-Id: If3990ed9524c6da5b3cb8966b63bc4a95d01fcda Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
92 lines
1.8 KiB
Text
92 lines
1.8 KiB
Text
/*
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* Copyright (c) 2019-2024, Intel Corporation. All rights reserved.
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* Copyright (c) 2024-2025, Altera Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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model = "ALTERA SOCFPGA AGILEX5";
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compatible = "arm,altera socfpga-agilex5";
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owner = "jit.loon.lim@intel.com";
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interrupt-parent = <&gic>;
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#address-cells = <1>;
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#size-cells = <1>;
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
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method = "smc";
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cpu_on = <0xdeadc0de>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "psci";
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a5";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a5";
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reg = <1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a5";
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reg = <2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a5";
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reg = <3>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x90000000>;
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};
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gic: interrupt-controller@2c010000 {
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compatible = "arm,gic-600", "arm,gic-v3";
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#address-cells = <2>;
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#interrupt-cells = <3>;
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#size-cells = <1>;
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#ranges;
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interrupt-controller;
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reg = <0x1D000000 0>, /* GICD */
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<0x1D060000 0>; /* GICR */
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interrupts = <0x1 0x9 0x4>;
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};
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serial0: uart@1a200000 {
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compatible = "arm,console-16550";
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reg = <0x10C02000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 8 0xf04>;
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clock-frequency = <100000000>;
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uart-baudrate = <115200>;
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};
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timer0: timer@1a040000 {
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compatible = "arm,armv7-timer-mem";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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reg = <0x1a040000 0x1000>;
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clock-frequency = <7500000>;
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frame@1a050000 {
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frame-number = <0>;
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interrupts = <0 2 0xf04>;
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reg = <0x1a050000 0x1000>;
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};
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};
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};
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