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222f885df3
This patch adds 'bitlock_t' type and bit_lock() and bit_unlock() to support locking/release functionality based on individual bit position. These functions use atomic bit set and clear instructions which require FEAT_LSE mandatory from Armv8.1. Change-Id: I3eb0f29bbccefe6c0f69061aa701187a6364df0c Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
117 lines
2.3 KiB
ArmAsm
117 lines
2.3 KiB
ArmAsm
/*
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* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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.globl spin_lock
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.globl spin_unlock
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.globl bit_lock
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.globl bit_unlock
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#if USE_SPINLOCK_CAS
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#if !ARM_ARCH_AT_LEAST(8, 1)
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#error USE_SPINLOCK_CAS option requires at least an ARMv8.1 platform
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#endif
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/*
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* When compiled for ARMv8.1 or later, choose spin locks based on Compare and
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* Swap instruction.
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*/
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/*
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* Acquire lock using Compare and Swap instruction.
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*
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* Compare for 0 with acquire semantics, and swap 1. If failed to acquire, use
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* load exclusive semantics to monitor the address and enter WFE.
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*
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* void spin_lock(spinlock_t *lock);
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*/
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func spin_lock
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mov w2, #1
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1: mov w1, wzr
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2: casa w1, w2, [x0]
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cbz w1, 3f
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ldxr w1, [x0]
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cbz w1, 2b
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wfe
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b 1b
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3:
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ret
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endfunc spin_lock
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#else /* !USE_SPINLOCK_CAS */
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/*
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* Acquire lock using load-/store-exclusive instruction pair.
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*
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* void spin_lock(spinlock_t *lock);
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*/
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func spin_lock
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mov w2, #1
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sevl
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l1: wfe
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l2: ldaxr w1, [x0]
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cbnz w1, l1
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stxr w1, w2, [x0]
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cbnz w1, l2
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ret
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endfunc spin_lock
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#endif /* USE_SPINLOCK_CAS */
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/*
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* Release lock previously acquired by spin_lock.
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*
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* Use store-release to unconditionally clear the spinlock variable.
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* Store operation generates an event to all cores waiting in WFE
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* when address is monitored by the global monitor.
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*
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* void spin_unlock(spinlock_t *lock);
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*/
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func spin_unlock
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stlr wzr, [x0]
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ret
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endfunc spin_unlock
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/*
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* Atomic bit clear and set instructions require FEAT_LSE which is
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* mandatory from Armv8.1.
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*/
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#if ARM_ARCH_AT_LEAST(8, 1)
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/*
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* Acquire bitlock using atomic bit set on byte. If the original read value
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* has the bit set, use load exclusive semantics to monitor the address and
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* enter WFE.
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*
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* void bit_lock(bitlock_t *lock, uint8_t mask);
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*/
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func bit_lock
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1: ldsetab w1, w2, [x0]
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tst w2, w1
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b.eq 2f
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ldxrb w2, [x0]
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tst w2, w1
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b.eq 1b
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wfe
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b 1b
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2:
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ret
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endfunc bit_lock
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/*
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* Use atomic bit clear store-release to unconditionally clear bitlock variable.
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* Store operation generates an event to all cores waiting in WFE when address
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* is monitored by the global monitor.
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*
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* void bit_unlock(bitlock_t *lock, uint8_t mask);
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*/
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func bit_unlock
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stclrlb w1, [x0]
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ret
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endfunc bit_unlock
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#endif /* ARM_ARCH_AT_LEAST(8, 1) */
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