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https://github.com/ARM-software/arm-trusted-firmware.git
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This has been introduced to simplify dependencies on the FDT wrappers. We generally want to avoid pulling in components on a file-by-file basis, particularly as we are trying to draw conceptual boxes around components in preparation for transitioning the build system to CMake, where dependencies are modelled on libraries rather than files. Signed-off-by: Chris Kay <chris.kay@arm.com> Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5
201 lines
5.7 KiB
Makefile
201 lines
5.7 KiB
Makefile
#
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# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include common/fdt_wrappers.mk
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# Include GICv2 driver files
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include drivers/arm/gic/v2/gicv2.mk
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JUNO_GIC_SOURCES := ${GICV2_SOURCES} \
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plat/common/plat_gicv2.c \
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plat/arm/common/arm_gicv2.c
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JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \
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plat/arm/common/arm_cci.c
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JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
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plat/arm/board/juno/juno_security.c \
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plat/arm/board/juno/juno_trng.c \
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plat/arm/common/arm_tzc400.c
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ifneq (${ENABLE_STACK_PROTECTOR}, 0)
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JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
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endif
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# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
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# SCP during power management operations and for SCP RAM Firmware transfer.
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CSS_USE_SCMI_SDS_DRIVER := 1
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PLAT_INCLUDES := -Iplat/arm/board/juno/include
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PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \
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plat/arm/board/juno/juno_common.c
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# Flag to enable support for AArch32 state on JUNO
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JUNO_AARCH32_EL3_RUNTIME := 0
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$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
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$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
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# Flag to enable support for TZMP1 on JUNO
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JUNO_TZMP1 := 0
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$(eval $(call assert_boolean,JUNO_TZMP1))
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ifeq (${JUNO_TZMP1}, 1)
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$(eval $(call add_define,JUNO_TZMP1))
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endif
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TRNG_SUPPORT := 1
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ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
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# Include BL32 in FIP
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NEED_BL32 := yes
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# BL31 is not required
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override BL31_SOURCES =
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# The BL32 needs to be built separately invoking the AARCH32 compiler and
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# be specifed via `BL32` build option.
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ifneq (${ARCH}, aarch32)
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override BL32_SOURCES =
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endif
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endif
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ifeq (${ARCH},aarch64)
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BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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plat/arm/board/juno/juno_err.c \
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plat/arm/board/juno/juno_bl1_setup.c \
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drivers/arm/sp805/sp805.c \
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${JUNO_INTERCONNECT_SOURCES} \
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${JUNO_SECURITY_SOURCES}
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BL2_SOURCES += drivers/arm/sp805/sp805.c \
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lib/utils/mem_region.c \
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plat/arm/board/juno/juno_err.c \
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plat/arm/board/juno/juno_bl2_setup.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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${JUNO_SECURITY_SOURCES}
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BL2U_SOURCES += ${JUNO_SECURITY_SOURCES}
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BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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lib/utils/mem_region.c \
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lib/fconf/fconf.c \
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lib/fconf/fconf_dyn_cfg_getter.c \
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plat/arm/board/juno/juno_bl31_setup.c \
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plat/arm/board/juno/juno_pm.c \
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plat/arm/board/juno/juno_topology.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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${JUNO_GIC_SOURCES} \
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${JUNO_INTERCONNECT_SOURCES} \
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${JUNO_SECURITY_SOURCES}
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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ifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
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BL1_SOURCES += drivers/arm/css/sds/sds.c
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endif
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ifeq (${TRUSTED_BOARD_BOOT}, 1)
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BL1_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
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BL2_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
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endif
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endif
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ifneq (${RESET_TO_BL31},0)
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$(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
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Please set RESET_TO_BL31 to 0.")
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endif
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ifeq ($(USE_ROMLIB),1)
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all : bl1_romlib.bin
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endif
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bl1_romlib.bin : $(BUILD_PLAT)/bl1.bin romlib.bin
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@echo "Building combined BL1 and ROMLIB binary for Juno $@"
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./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT)
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# Errata workarounds for Cortex-A53:
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ERRATA_A53_819472 := 1
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ERRATA_A53_824069 := 1
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ERRATA_A53_826319 := 1
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ERRATA_A53_827319 := 1
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ERRATA_A53_835769 := 1
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ERRATA_A53_836870 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 1
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# Errata workarounds for Cortex-A57:
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ERRATA_A57_806969 := 0
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ERRATA_A57_813419 := 1
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ERRATA_A57_813420 := 1
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ERRATA_A57_814670 := 1
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ERRATA_A57_817169 := 1
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ERRATA_A57_826974 := 1
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ERRATA_A57_826977 := 1
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ERRATA_A57_828024 := 1
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ERRATA_A57_829520 := 1
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ERRATA_A57_833471 := 1
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ERRATA_A57_859972 := 0
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# Errata workarounds for Cortex-A72:
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ERRATA_A72_859971 := 0
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# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
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# power down sequence
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SKIP_A57_L1_FLUSH_PWR_DWN := 1
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# Do not enable SVE
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ENABLE_SVE_FOR_NS := 0
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# Enable the dynamic translation tables library.
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ifeq (${ARCH},aarch32)
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ifeq (${RESET_TO_SP_MIN},1)
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BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
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endif
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else
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ifeq (${RESET_TO_BL31},1)
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BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
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endif
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endif
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ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
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ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
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BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
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else
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BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
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endif
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endif
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BL1_CPPFLAGS += -march=armv8-a+crc
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BL2_CPPFLAGS += -march=armv8-a+crc
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BL2U_CPPFLAGS += -march=armv8-a+crc
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BL31_CPPFLAGS += -march=armv8-a+crc
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BL32_CPPFLAGS += -march=armv8-a+crc
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# Add the FDT_SOURCES and options for Dynamic Config
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FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \
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plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts \
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fdts/${PLAT}.dts
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FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG}))
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include plat/arm/board/common/board_common.mk
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include plat/arm/common/arm_common.mk
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include plat/arm/soc/common/soc_css.mk
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include plat/arm/css/common/css_common.mk
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