Andre Przywara 1f8be7fc66 fix(mpam): feat_detect: support major/minor ... The MPAM CPU ID version number is split between two CPU ID register fields, with the second being a fractional field, allowing for instance for a "MPAM v1.1" number. The read_feat_mpam_version() function merges those two fields to form a "4.4" fixed point fractional number, but the limit check in the check_feature() function was not taking this into account. To support MPAM major version 1, extend the limit from "1" to "17", to cover the current maximum version of "MPAM v1.1". This fixes FVP runs with "has_mpam=1" and FEATURE_DETECTION enabled. Change-Id: Icb557741d597e4e43eaf658b78f18af6e9fb439e Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2023-03-21 14:53:02 +00:00
..
aarch32	refactor(aarch64): rename do_panic and el3_panic	2023-02-21 17:26:01 +00:00
aarch64	refactor(bl31): use elx_panic for sysreg_handler64	2023-02-22 17:24:17 +00:00
backtrace	fix(debug): decouple "get_el_str()" from backtrace	2022-11-08 10:10:19 +00:00
bl_common.c	feat(bl): add interface to query TF-A semantic ver	2022-08-02 16:04:23 -05:00
desc_image_load.c	SPMD: extract SPMC DTB header size from SPMD	2020-05-13 08:08:39 +02:00
fdt_fixup.c	Merge "feat(libfdt): add function to set MAC addresses" into integration	2022-07-08 13:29:58 +02:00
fdt_wrappers.c	fix(fdt-wrappers): use correct prototypes	2023-01-10 18:59:58 +01:00
fdt_wrappers.mk	build(fdt-wrappers): introduce FDT wrappers makefile	2021-10-26 12:14:28 +01:00
feat_detect.c	fix(mpam): feat_detect: support major/minor	2023-03-21 14:53:02 +00:00
image_decompress.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
runtime_svc.c	Remove support for the SMC Calling Convention 2.0	2019-01-30 16:01:49 +00:00
tf_crc32.c	refactor(hw_crc32): renamed hw_crc32 to tf_crc32	2021-08-02 17:15:41 +01:00
tf_log.c	feat(common/debug): add new macro ERROR_NL() to print just a newline	2021-07-21 00:01:06 +02:00
uuid.c	feat(spmc): add FFA_PARTITION_INFO_GET handler	2022-05-13 15:51:23 +01:00