Bipin Ravi 1f73247132 fix(cpus): workaround for Cortex-A715 erratum 2420947 ... Cortex-A715 erratum 2420947 is a cat B erratum that applies only to revision r1p0 and is fixed in r1p1. The workaround is to set bit[33] of CPUACTLR2_EL1. This will prevent store and store-release to merge inside the write buffer, and it is not expected to have much performance impacts. SDEN can be found here: https://developer.arm.com/documentation/SDEN2148827/latest Change-Id: I01a71b878cd958e742ff8357f8cdfbfc5625de47 Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>		2024-03-06 13:10:31 -06:00
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alt-boot-flows.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
auth-framework.rst	docs(auth): add missing AUTH_PARAM_NV_CTR value	2024-02-02 15:32:34 +01:00
cpu-specific-build-macros.rst	fix(cpus): workaround for Cortex-A715 erratum 2420947	2024-03-06 13:10:31 -06:00
firmware-design.rst	feat(mte): add mte2 feat	2024-02-12 08:20:01 -06:00
index.rst	docs: add top level section numbering	2022-11-16 14:06:48 +00:00
interrupt-framework-design.rst	Fix broken links to various sections across docs	2020-08-03 09:55:04 -05:00
psci-pd-tree.rst	doc: Set correct syntax highlighting style	2019-05-22 11:28:17 +01:00
reset-design.rst	docs: update RESET_TO_BL31 documentation	2023-03-09 14:42:49 +00:00
trusted-board-boot-build.rst	docs(arm): add ARM_ROTPK_LOCATION variant full key	2022-12-09 14:55:39 -06:00
trusted-board-boot.rst	docs(auth): align TBBR CoT names to match the code	2024-02-26 12:39:06 +00:00