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20 lines
718 B
C
20 lines
718 B
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __CORTEX_A12_H__
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#define __CORTEX_A12_H__
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/*******************************************************************************
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* Cortex-A12 midr with version/revision set to 0
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******************************************************************************/
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#define CORTEX_A12_MIDR 0x410FC0C0
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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******************************************************************************/
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#define CORTEX_A12_ACTLR_SMP_BIT (1 << 6)
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#endif /* __CORTEX_A12_H__ */
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